Datasheet

Product data sheet Rev. 1 — 19 February 2014 39 of 99

NXP Semiconductors

LPC15xx

32-bit ARM Cortex-M3 microcontroller

• Four registers to indicate which specific input sources caused the abort input to the

SCTs.

• Four additional outputs which can be sampled at certain times and latched at others

before being routed to SCT inputs.

• Nine abort inputs. Any combination of the abort inputs can trigger the dedicated abort

input of each SCT.

8.23 Quadrature Encoder Interface (QEI)

A quadrature encoder, also known as a 2-channel incremental encoder, converts angular

displacement into two pulse signals. By monitoring both the number of pulses and the

relative phase of the two signals, the user code can track the position, direction of rotation,

and velocity. In addition, a third channel, or index signal, can be used to reset the position

counter. The quadrature encoder interface decodes the digital pulses from a quadrature

encoder wheel to integrate position over time and determine direction of rotation. In

addition, the QEI can capture the velocity of the encoder wheel.

8.23.1 Features

• Tracks encoder position.

• Increments/decrements depending on direction.

• Programmable for 2 or 4 position counting.

• Velocity capture using built-in timer.

• Velocity compare function with “less than” interrupt.

• Uses 32-bit registers for position and velocity.

• Three position-compare registers with interrupts.

• Index counter for revolution counting.

• Index compare register with interrupts.

• Can combine index and position interrupts to produce an interrupt for whole and

partial revolution displacement.

• Digital filter with programmable delays for encoder input signals.

• Can accept decoded signal inputs (clock and direction).

8.24 Analog-to-Digital Converter (ADC)

The ADC supports a resolution of 12 bit and fast conversion rates of up to 2 Msamples/s.

Sequences of analog-to-digital conversions can be triggered by multiple sources. Possible

trigger sources are internal connections to other on-chip peripherals such as the SCT and

analog comparator outputs, external pins, and the ARM TXEV interrupt.

The ADC supports a variable clocking scheme with clocking synchronous to the system

clock or independent, asynchronous clocking for high-speed conversions.

The ADC includes a hardware threshold compare function with zero-crossing detection.

The threshold crossing interrupt is connected internally to the SCT inputs for tight timing

control between the ADC and the SCTs.