Datasheet

LPC15XX All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
Product data sheet Rev. 1 — 19 February 2014 25 of 99
NXP Semiconductors
LPC15xx
32-bit ARM Cortex-M3 microcontroller
8.8 Memory map
See Section 8.5 “SRAM” for SRAM configuration.
Fig 10. Memory map
0x4000 4000
0x4000 8000
0x4000 C000
0x4001 8000
0x4002 8000
0x4003 8000
0x4003 C000
0x4004 0000
0x4004 4000
0x4004 8000
0x4004 C000
0x4005 0000
0x4005 8000
0x4005 C000
0x4008 0000
0x4008 0000
0x4001 C000
0x4001 4000
0x4000 0000
0x4002 C000
0x4003 0000
reserved
256 kB flash
0x0000 0000
0 GB
4 GB
0x0200 0000
0x0300 8000
0x0320 0000
0x0320 1000
0x1C01 0000
0x1C01 4000
0xFFFF FFFF
4 kB EEPROM
reserved
reserved
0x1000 0000
0x1C00 0000
APB peripherals 0
0x1C01 8000
0x1C01 C000
0x1C00 4000
CRC
GPIO
0x1C00 8000
0x1C00 C000
DMA
0x1C02 4000
0x4000 0000
0x4008 0000
APB peripherals 1
0x400F 0000
0x0200 9000
36 kB SRAM (LPC1549/19)
0x0200 5000
20 kB SRAM (LPC1548/18)
0x0200 3000
12 kB SRAM (LPC1547/17)
reserved
LPC15xx
0x0004 0000
32 kB boot ROM
0x0000 0000
0x0000 00C0
active interrupt vectors
reserved
0x0300 0000
reserved
reserved
reserved
reserved
reserved
SCTimer0/PWM
0x1C02 0000
SCTimer1/PWM
SCTimer2/PWM
0x1C02 8000
SCTimer3/PWM
0x4005 4000
0x4007 4000
0xE000 0000
0xE010 0000
private peripheral bus
0x4007 8000
ADC0
DAC
analog comparators ACMP
reserved
reserved
RTC
WWDT
reserved
USART0
QEI
reserved
USART1
SPI0
reserved
I2C0
SYSCON
INPUT MUX
reserved
switch matrix SWM
PMU
SPI1
reserved
0
1
2
4:3
5
6
9:7
16
15
14
17
18
19
22
20
21
28:23
29
10
11
13:12
31:30
APB peripherals
0x4008 4000
0x400A 0000
0x400A 4000
0x400A C000
0x400B 4000
0x400C 0000
0x400C 4000
0x400E 8000
0x400E C000
0x400F 0000
0x400F 4000
0x400F 8000
0x400F 0000
0x400B 0000
0x400A 8000
0x400B 8000
0x400B C000
0x400F C000
ADC1
reserved
MRT
reserved
RIT
SCTIPU
flash ctrl FMC
reserved
PINT
reserved
C_CAN
IOCON
GINT0
GINT1
USART2
reserved
reserved
EEPROM CTRL
0
7:1
8
9
10
11
12
26
25:17
16
27
28
29
30
31
13
14
15
USB
aaa-010871