Datasheet

LPC15XX All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
Product data sheet Rev. 1 — 19 February 2014 17 of 99
NXP Semiconductors
LPC15xx
32-bit ARM Cortex-M3 microcontroller
PIO2_9 - - 94
[5]
I; PU IO PIO2_9 — General purpose port 2 input/output 9.
On the LQFP100 package, this pin is assigned to
CAN0_RD in ISP C_CAN mode.
PIO2_10 - - 96
[5]
I; PU IO PIO2_10 — General purpose port 2 input/output 10.
PIO2_11 - - 99
[5]
I; PU IO PIO2_11 — General purpose port 2 input/output 11.
PIO2_12 35 47 74
[5]
I; PU IO PIO2_12 — General purpose port 2 input/output 12. On
parts LPC1519/17/18 only.
PIO2_13 36 48 75
[5]
I; PU IO PIO2_13 — General purpose port 2 input/output 13. On
parts LPC1519/17/18 only.
USB_DP 35 47 74
[10]
- IO USB bidirectional D+ line. Pad includes internal 33 
series termination resistor. On parts LPC1549/48/47 only.
USB_DM 36 48 75
[10]
- IO USB bidirectional D line. Pad includes internal 33 
series termination resistor. On parts LPC1549/48/47 only.
RTCXIN 31 42 66
[9]
- RTC oscillator input. This input should be grounded if the
RTC is not used.
RTCXOUT 32 43 67
[9]
- RTC oscillator output.
XTALIN 26 36 54
[9]
- Input to the oscillator circuit and internal clock generator
circuits. Input voltage must not exceed 1.8 V.
XTALOUT 25 35 53
[9]
- Output from the oscillator amplifier.
VBAT 30 41 65 - Battery supply voltage. If no battery is used, tie VBAT to
VDD or to ground.
V
DDA
16 20 30 - Analog supply voltage. V
DD
and the analog reference
voltages VREFP_ADC and VREFP_DAC_VDDCMP must
not exceed the voltage level on V
DDA
. V
DDA
should typically
be the same voltages as V
DD
but should be isolated to
minimize noise and error. V
DDA
should be tied to V
DD
if the
ADC is not used.
V
DD
39,
27,
42
22,
52,
37,
57
4,
32,
70,
83,
57,
89
- 3.3 V supply voltage (2.4 V to 3.6 V). The voltage level on
V
DD
must be equal or lower than the analog supply
voltage V
DDA
.
VREFP_DAC_VDDCMP 14 18 27
[9]
- DAC positive reference voltage and analog comparator
reference voltage. The voltage level on
VREFP_DAC_VDDCMP must be equal to or lower than
the voltage applied to V
DDA
.
VREFN 11 14 22 - ADC and DAC negative voltage reference. If the ADC is
not used, tie VREFN to V
SS
.
Table 3. Pin description with fixed-pin functions
Symbol
LQFP48 LQFP64 LQFP100
Reset
state
[1]
Type Description