Datasheet

LPC15XX All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
Product data sheet Rev. 1 — 19 February 2014 16 of 99
NXP Semiconductors
LPC15xx
32-bit ARM Cortex-M3 microcontroller
PIO1_14/SCT0_OUT7 --12
[5]
I; PU IO PIO1_14 — General purpose port 1 input/output 14.
O SCT0_OUT7 — SCTimer0/PWM output 7.
PIO1_15 - - 15
[5]
I; PU IO PIO1_15 — General purpose port 1 input/output 15.
PIO1_16 - - 18
[5]
I; PU IO PIO1_16 — General purpose port 1 input/output 16.
PIO1_17/SCT1_OUT7 --20
[5]
I; PU IO PIO1_17 — General purpose port 1 input/output 17.
O SCT1_OUT7 — SCTimer1/PWM output 7.
PIO1_18 - - 25
[5]
I; PU IO PIO1_18 — General purpose port 1 input/output 18.
PIO1_19 - - 29
[5]
I; PU IO PIO1_19 — General purpose port 1 input/output 19.
PIO1_20/SCT2_OUT5 --34
[5]
I; PU IO PIO1_20 — General purpose port 1 input/output 20.
O SCT2_OUT5 — SCTimer2/PWM output 5.
PIO1_21 - - 37
[5]
I; PU IO PIO1_21 — General purpose port 1 input/output 21.
PIO1_22 - - 38
[5]
I; PU IO PIO1_22 — General purpose port 1 input/output 22.
PIO1_23 - - 42
[5]
I; PU IO PIO1_23 — General purpose port 1 input/output 23.
PIO1_24/SCT3_OUT5 --44
[5]
I; PU IO PIO1_24 — General purpose port 1 input/output 24.
O SCT3_OUT5 — SCTimer3/PWM output 5.
PIO1_25 - - 46
[5]
I; PU IO PIO1_25 — General purpose port 1 input/output 25.
PIO1_26 - - 48
[5]
I; PU IO PIO1_26 — General purpose port 1 input/output 26.
PIO1_27 - - 50
[5]
I; PU IO PIO1_27 — General purpose port 1 input/output 27.
PIO1_28 - - 55
[5]
I; PU IO PIO1_28 — General purpose port 1 input/output 28.
PIO1_29 - - 56
[5]
I; PU IO PIO1_29 — General purpose port 1 input/output 29.
PIO1_30 - - 59
[5]
I; PU IO PIO1_30 — General purpose port 1 input/output 30.
PIO1_31 - - 60
[5]
I; PU IO PIO1_31 — General purpose port 1 input/output 31.
PIO2_0 - - 62
[5]
I; PU IO PIO2_0 — General purpose port 2 input/output 0.
PIO2_1 - - 64
[5]
I; PU IO PIO2_1 — General purpose port 2 input/output 1.
PIO2_2 - - 72
[5]
I; PU IO PIO2_2 — General purpose port 2 input/output 2.
PIO2_3 - - 76
[5]
I; PU IO PIO2_3 — General purpose port 2 input/output 3.
PIO2_4 - - 77
[5]
I; PU IO PIO2_4 — General purpose port 2 input/output 4.
On the LQFP100 package, this is the ISP_1 boot pin.
PIO2_5 - - 80
[5]
I; PU IO PIO2_5 — General purpose port 2 input/output 5.
On the LQFP100 package, this is the ISP_0 boot pin.
PIO2_6 - - 82
[5]
I; PU IO PIO2_6 — General purpose port 2 input/output 6.
On the LQFP100 package, this pin is assigned to U0_TXD
in ISP USART mode.
PIO2_7 - - 86
[5]
I; PU IO PIO2_7 — General purpose port 2 input/output 7.
On the LQFP100 package, this pin is assigned to
U0_RXD in ISP USART mode.
PIO2_8 - - 92
[5]
I; PU IO PIO2_8 — General purpose port 2 input/output 8.
On the LQFP100 package, this pin is assigned to
CAN0_TD in ISP C_CAN mode.
Table 3. Pin description with fixed-pin functions
Symbol
LQFP48 LQFP64 LQFP100
Reset
state
[1]
Type Description