Datasheet

Table 1. Feature Set (continued)
Feature S32V234 S32V232
• Two Periodic Interrupt Timer (PIT)
• IEEE 1588 Timers (part of Ethernet
Subsystem)
Communications • UART(w/ LIN2.1l)
• Serial peripheral interface (SPI)
• I2C blocks
• PCI express 2.0 with endpoint and root
complex support
• LFAST serial link
• 1 GBit Ethernet with PTP IEEE 1588
• FD-CAN
• Flexray Dual Channel, Version 2.1
RevA
• Same as S32V234
Memory Interfaces • 32-bit DRAM Controller with support for
LPDDR2/DDR3/DDR3L - Data rate of
up to 1066 MT/s at 533 MHz clock
frequency with ECC (SEC-DED-TED)
single error correction, double error
detection, and triple error detection
support for subregion
• Dual QuadSPI supporting Execute-In-
Place (XIP)
• Same as S32V234
Video input interfaces, Image
processing, graphics
processing, display
• Display Control Unit (2D-ACE) with 24-
bit RGB, GPU framebuffer decoding
• GPU GC3000 with frame buffer
compression
• 2x Video interface unit (VIU) for camera
input
• 2x CSI with 4 lanes for camera input
(support 1080p @ 30fps)
• Image signal processor (ISP),
supporting 2x1 or 1x2 MPixel @ 30fps
and 4x1 MPixel for subset of functions
(exposure control, gamma correction)
• 2x APEX2-CL Image cognition
processor (dual 32-bit array processor)
• JPEG video decoder (8/12-bit)
• H.264 video decoder (8/10/12-bit), High-
intra and constrained baseline formats
• H.264 video encoder (8/10/12-bit), I-
frames only
• Safe Fast DMA for data transfers
between DRAM and System RAM with
CRC
• Same as S32V234
Analog • 1x 12-bit SAR ADC with self-test • Same as S32V234
Human-Machine Interface
(HMI)
• SIUL, GPIO pins with interrupt support,
DMA request capability, digital glitch
filter.
• Configurable slew rate and drive
strength on all output pins
• Same as S32V234
System RAM • 4 MB On-Chip System RAM with ECC • 3 MB On-Chip System RAM with ECC
Power Consumption • Run modes: • Same as S32V234
Family comparison
S32V234 Data Sheet, Rev. 8, 01/2019
NXP Semiconductors 7