Datasheet

6.6.3 MIPICSI2 D-PHY electrical and timing parameters
The MIPICSI2 D-PHY
2
is compliant with MIPICSI2 version 1.0, D-PHY specification
Rev. 1.01.00 (for MIPICSI2 sensor port x4 lanes)
6.6.3.1 Electrical and timing Information
Table 55. Electrical and timing Information
Symbol Parameters Test conditions Min Typ Max Unit
HS Line Receiver DC Specifications
V
IDTH
Differential input high voltage
threshold
- - 70 mV
V
IDTL
Differential input low voltage
threshold
-70 - - mV
V
IHHS
Single ended input high voltage - - 460 mV
V
ILHS
Single ended input low voltage -40 - - mV
V
CMRXDC
Input common mode voltage 70 - 330 mV
V
TERM-EN
Single-ended threshold for HS
termination enable
- - 450 mV
Z
ID
Differential input impedance 80 - 125 ohm
LP Line Receiver DC Specifications
V
ILLP
Input low voltage - - 550 mV
V
IHLP
Input high voltage 880 - - mV
V
IL-ULPS
Input low voltage (ultra low power
state)
- - 300 mV
V
HYST
Input hysteresis 25 - - mV
2. All rights reserved. This material is reprinted with the permission of the MIPI Alliance, Inc. No part(s) of this document may
be disclosed, reproduced or used for any purpose other than as needed to support the use of the products of NXP Inc.
Display modules
S32V234 Data Sheet, Rev. 8, 01/2019
NXP Semiconductors 65