Datasheet

7. Total capacitance including silicon, package pin and bond wire
8. Total inductance including silicon, package pin and bond wire
FlexRay
6.5.4.1 FlexRay timing parameters
This section provides the FlexRay interface timing characteristics for the input and output
signals. These numbers are recommended per the FlexRay Electrical Physical Layer
Specification, Version 3.0.1, and subject to change per the final timing analysis of the
device.
6.5.4.2 TxEN
dCCTxEN
RISE
dCCTxEN
FALL
20 %
80 %
TxEN
Figure 31. TxEN signal
Table 40. TxEN output characteristics
1
Name Description Min Max Unit
dCCTxEN
RISE25
Rise time of TxEN signal at CC - 9 ns
dCCTxEN
FALL25
Fall time of TxEN signal at CC - 9 ns
dCCTxEN
01
Sum of delay between Clk to Q of
the last FF and the final output
buffer, rising edge
- 25 ns
dCCTxEN
10
Sum of delay between Clk to Q of
the last FF and the final output
buffer, falling edge
- 25 ns
1. TxEN pin load maximum 25 pF.
6.5.4
FlexRay
S32V234 Data Sheet, Rev. 8, 01/2019
50 NXP Semiconductors