Datasheet

1. SMPL_PTR should be set to 1. For SPI_CTARn[BR] - 'Baud Rate Scaler' configuration is >= 3.
2. Slave Receive Only Mode can operate at a maximum frequency of 60 MHz. In this mode, the DSPI can receive data on
SIN, but no valid data is transmitted on SOUT.
3. This value of 16 ns is with the configuration prescaler values: SPI_CTARn[PCSSCK] - "PCS to SCK Delay Prescaler"
configuration is "3" (01h) and SPI_CTARn[CSSCK] - "PCS to SCK Delay Scaler" configuration is "2" (0000h).
4. This value of 16 ns is with the configuration prescaler values: SPI_CTARn[PASC] - "After SCK Delay Prescaler"
configuration is "3" (01h) and SPI_CTARn[ASC] - "After SCK Delay Scaler" configuration is "2" (0000h).
NOTE
DSPI Timing specs on this chip are valid with Slave in Classic
Mode only.
Data
Last Data
First Data
First Data Data Last Data
SIN
SOUT
PCSx
SCK Output
4
9
12
1
11
10
4
SCK Output
(CPOL=0)
(CPOL =1)
3
2
Figure 16. DSPI classic SPI timing — master, CPHA = 0
Communication modules
S32V234 Data Sheet, Rev. 8, 01/2019
40 NXP Semiconductors