Datasheet

Figure 10. DDR3 and DDR3L command and address timing parameters
NOTE
RESET pin has an external weak pull DOWN requirement if
DDR3 memory is NOT required to support content retention in
the device low power modes where core voltage is off but
DRAM voltage is on.
NOTE
RESET pin has an external weak pull UP requirement if DDR3
memory is required to support content retention in the device
low power modes where core voltage is off but DRAM voltage
is on.
NOTE
CKE pin has an external weak pull down requirement.
Memory interfaces
S32V234 Data Sheet, Rev. 8, 01/2019
32 NXP Semiconductors