Datasheet

6.1.1.1 Input equivalent circuit
R
F
C
F
R
S
R
L
R
SW1
C
P2
V
DD
Sampling
Source Filter Current Limiter
EXTERNAL CIRCUIT INTERNAL CIRCUIT SCHEME
R
S
Source Impedance
R
F
Filter Resistance
C
F
Filter Capacitance
R
L
Current Limiter Resistance
R
SW1
Channel Selection Switch Impedance
R
AD
Sampling Switch Impedance
C
P
Pin Capacitance (two contributions, C
P1
and C
P2
)
C
S
Sampling Capacitance
C
P1
R
AD
Channel
Selection
V
A
C
S
Figure 3. Input equivalent circuit
Table 16. ADC conversion characteristics
Symbol Parameter Conditions Min Typ Max Unit
f
CK
ADC Input Clock frequency
(Bus clock)
— 20 — 80 MHz
f
AD_clk
ADC Conversion clock
frequency
1
20 40 MHz
f
s
Sampling frequency — — — 0.5 MHz
t
sample
Sample time
2
500 — — ns
t
conv
Conversion time
3
1400 — — ns
C
S
ADC input sampling
capacitance
— — — 5 pF
C
P1
ADC input pin capacitance 1 — — — 5 pF
C
P2
ADC input pin capacitance 2 — — — 0.8 pF
R
SW1
Internal resistance of analog
source
— — — 875 Ω
R
AD
Internal resistance of analog
source
— — — 825 Ω
INL
4
Integral non linearity — –3 — 3 LSB
DNL Differential non linearity — –2 — 2 LSB
OFS Offset error — –6 — 6 LSB
GNE Gain error — –6 — 6 LSB
Input (single ADC
channel)
Max leakage 125C — — 2000 nA
TUE Total unadjusted error — –8 — 8 LSB
Analog modules
S32V234 Data Sheet, Rev. 8, 01/2019
22 NXP Semiconductors