Datasheet

Table 6. Power consumption (continued)
Parameter Description Max Values
125C T
j
105C T
j
2) Reset/idle
VDD_HV_ADV ADC operational 1 mA
VDD_REFH_ADC Voltage reference for ADC 80 μA
1. Data represented is at 125 °C T
j
and 1.01 V vdd conditions
2. Includes SoC, GPU, and ARM supply combinations depending on use case description.
3. Adder to the static idd current component. 4xCortex A53 executing Dhrystone MIPS in AArch64 and the interconnect,
System RAM, FastDMA, Cortex M4, peripheral bridges, FCCU, CSE, MEMU, PCIe, and STCU are clocked - static power
consumption excluded.
4.5 Electrostatic discharge (ESD) specifications
Electrostatic discharges are applied to the pins of each sample in conformity with AEC-
Q100-002/-011 to meet the HBM and CDM ratings described below.
Table 7. ESD ratings
1
Symbol Parameter Conditions Class Max value
2
Unit
V
ESD(HBM)
Electrostatic discharge
(Human Body Model)
T
A
= 25 °C conforming to AEC-
Q100-002
H1C 2000 V
V
ESD(CDM)
Electrostatic discharge
(Charged Device Model)
T
A
= 25 °C conforming to AEC-
Q100-011
C3A 500 V
1. A device will be defined as a failure if after exposure to ESD pulses the device no longer meets the device specification
requirements. Complete DC parametric and functional testing shall be performed per applicable device specification at
room temperature followed by hot temperature, unless specified otherwise in the device specification.
2. Data based on characterization results, not tested in production.
4.6 Electromagnetic Compatibility (EMC) specifications
EMC measurements to IC-level IEC standards are available from NXP on request.
4.7
PCB routing guidelines
DDR3/DDR3L PCB design
• CLK/Addess/Commands
• Route with 50 ohm controlled impedance and differential pair (CLK) with 100
ohm controlled impedance
• Use Fly by topology in case of multiple memory components
• Address and command lines Terminated to VTT with 50 ohm
• To be referenced with Power, not Ground
General
S32V234 Data Sheet, Rev. 8, 01/2019
NXP Semiconductors 13