Datasheet
Table 4. Recommended operating conditions (continued)
Symbol Parameter Conditions Min Max Unit
V
DD_HV_PMC
,
V
DDIO_LFAST
,
V
DD_HV_EFUSE
,
V
DD_HV_DDR
V
DD_LV_PLL
V
DD_LV_POST
1.0 V supply voltage (for analog circuits, PLLs) — 0.95 1.05 V
V
REFH_ADC
1.8 V ADC high reference voltage — 1.71 1.95 V
V
DD_HV_ADV
1.8 V ADC supply voltage — 1.71 1.95 V
V
SS_HV_ADV
ADC ground and low reference voltage — 0 0 V
V
REFL_ADC
1.8 V ADC supply ground — 0 0 V
V
DD_DDR_IO
DDR I/O supply voltage LPDDR2 — 1.14 1.30 V
DDR I/O supply voltage DDR3 — 1.425 1.575 V
DDR I/O supply voltage DDR3L — 1.283 1.45 V
P
CIE_VP
PCIe supply voltages — 0.95 1.05 V
P
CIE_VPH
— 1.71 1.95 V
T
A
Ambient temperature — -40 105
3
°C
T
J
Junction temperature under bias — -40 125 °C
TV
DD
Supply ramp rate for all supplies on the device — 0.05 25 V/ms
1. All the grounds viz. V
SS
, V
SS_FXOSC
, and V
SS_HV_ADV
are tied together at the package level.
2. V
DD_LV_CORE_SOC
, V
DD_LV_CORE_ARM
, and V
DD_LV_CORE_GPU
supply balls should all be connected together to one power
plane and one regulator to avoid voltage level differences. If the GPU is power gated as it is not used, the
V
DD_LV_CORE_GPU
supply balls have to be statically connected to the ground plane. If the second ARM CPUs per cluster is
power gated as they are not used, the V
DD_LV_CORE_ARM
supply balls have to be statically connected to the ground plane.
3. Maximum ambient temperature requires management of the heat dissipation to ensure the device junction temperature
does not exceed the maximum.
4.3 Power Management Controller (PMC) electrical specifications
PMC is composed of the following blocks:
• Low voltage detector (LVD_33_PMC) for 3.3 V VDD_GPIO0 supply (GPIO
segment and PMC) and Low Voltage Detector for FIRC (VDD_HV_FXOSC)
• Low voltage detector (LVD_18) for VDD_HV_PMC
• Low voltage detector (LVD_18) for VDD_HV_FXOSC
• High voltage detector (HVD_18) for VDD_HV_PMC
• Low voltage detector (LVD_CORE) for VDD_LV_CORE_SOC
• High voltage detector (HVD_CORE) for VDD_LV_CORE_SOC
• Power on Reset (POR)
General
S32V234 Data Sheet, Rev. 8, 01/2019
10 NXP Semiconductors