Datasheet

MPC5566 Microcontroller Product Brief, Rev. 1
Features
Freescale Semiconductor8
2.6.6 External Bus Interface (EBI)
• 1.8 – 3.3 V I/O nominal voltage
• Memory controller with support for various memory types
• MPC5566 specifications:
— 416 BGA: 32-bit data bus, 26-bit address bus
— 496 BGA: 32-bit data bus, 26-bit address bus
• 26-bit address bus: the two most significant bits (MSBs), ADDR[6:7], are multiplexed with the two
least significant bits (LSBs) ADDR[30:31].
• Selectable drive strength
• Configurable bus speed modes
• Support for external master accesses to internal addresses
• Burst support
• Bus monitor
• Four chip selects: CS[0:3] multiplexed with ADDR[8:11].
• Four write/byte enable (WE/BE[0:1]) signals in the 416-pin package
• Configurable wait states
• Optional automatic CLKOUT gating to save power and reduce EMI
• Compatible with MPC5xx external bus (with some limitations): Selectable drive strengths;
10 pF, 20 pF, 30 pF, 50 pF
2.6.7 Calibration Bus Interface
• Calibration bus interface only accessible through 496-pin VertiCal assembly top connector
• 1.8 – 3.3 V nominal I/O voltage
• Memory controller shared with EBI
• 16-bit data bus (CAL_DATA[0:15])
• Four calibration bus chip selects (CAL_CS
[0:3]); three calibration chip select signals
(CAL_CS
[1:3]) are muxed with three calibration address signals (CAL_ADDR[9:11])
• 19-bit calibration address bus (CAL_ADDR[12:30]); no support for the least significant address
bit (CAL_ADDR31)
• Up to 22-bit calibration address bus by using CAL_ADDR[9:11] with one calibration chip select
signal (CAL_CS
[0]) to provide a 4 MB addressing range