Datasheet

i.MX RT1015 Crossover Processors Data Sheet for Consumer Products, Rev. 0.1, 03/2019
54 NXP Semiconductors
Electrical characteristics
Figure 34. LPSPI slave mode timing (CPHA = 1)
4.8.2 LPI2C module timing parameters
This section describes the timing parameters of the LPI2C module.
4.8.2.1 Bus operation condition for 3.3 V and 1.8 V signaling
Signaling level of SD/eMMC4.3 and eMMC4.4/4.41 modes is 3.3 V. Signaling level of SDR104/SDR50
mode is 1.8 V. The DC parameters for the NVCC_SD1 supply are identical to those shown in Table 21,
"Single voltage GPIO DC parameters," on page 26.
4.8.3 LPUART electrical specifications
Please refer to Section 4.3.2.1, General purpose I/O AC parameters.
Table 48. LPI2C module timing parameters
Symbol Description Min Max Unit Notes
f
SCL
SCL clock frequency Standard mode (Sm) 0 100 kHz
1, 2
1
Hs-mode is only supported in slave mode.
2
See General switching specifications.
Fast mode (Fm) 0 400
Fast mode Plus (Fm+) 0 1000
Ultra Fast mode (UFm) 0 5000
High speed mode (Hs-mode) 0 3400
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