Datasheet

Electrical characteristics
i.MX RT1015 Crossover Processors Data Sheet for Consumer Products, Rev. 0.1, 03/2019
NXP Semiconductors 53
Figure 33. LPSPI slave mode timing (CPHA = 0)
Table 47. LPSPI slave mode timing
Number Symbol Description Min. Max. Units Note
1f
OP
Frequency of operation 0 f
periph
/ 2 Hz
1
1
Absolute maximum frequency of operation (fop) is 30 MHz. The clock driver in the LPSPI module for f
periph
must be
guaranteed this limit is not exceeded.
2t
SPSCK
SPSCK period 4 x t
periph
—ns
2
2
t
periph
= 1 / f
periph
3t
Lead
Enable lead time 1 — t
periph
—
4t
Lag
Enable lag time 1 — t
periph
—
5t
WSPSCK
Clock (SPSCK) high or low time t
periph
- 30 — ns —
6t
SU
Data setup time (inputs) 2.5 — ns —
7t
HI
Data hold time (inputs) 3.5 — ns —
8t
a
Slave access time — t
periph
ns
3
3
Time to data active from high-impedance state
9t
dis
Slave data disable time — t
periph
ns
4
4
Hold time to high-impedance state
10 t
V
Data valid (after SPSCK edge) — 31 ns —
11 t
HO
Data hold time (outputs) 0 — ns —
12 t
RI
t
FI
Rise time input
Fall time input
—t
periph - 25
ns —
13 t
RO
t
FO
Rise time input
Fall time input
—25ns—
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