Datasheet

Electrical characteristics
i.MX RT1015 Crossover Processors Data Sheet for Consumer Products, Rev. 0.1, 03/2019
NXP Semiconductors 35
4.4.4 Debug trace timing specifications
Figure 13. ARM_TRACE_CLK specifications
SJ9 JTAG_TMS, JTAG_TDI data hold time 25 — ns
SJ10 JTAG_TCK low to JTAG_TDO data valid — 44 ns
SJ11 JTAG_TCK low to JTAG_TDO high impedance — 44 ns
SJ12 JTAG_TRST_B assert time 100 — ns
SJ13 JTAG_TRST_B set-up time to JTAG_TCK low 40 — ns
1
T
DC
= target frequency of SJC
2
V
M
= mid-point voltage
Table 29. Debug trace operating behaviors
Symbol Description Min Max Unit
T1 ARM_TRACE_CLK frequency of operation — 70 MHz
T2 ARM_TRACE_CLK period 1/T1 — MHz
T3 Low pulse width 6 — ns
T4 High pulse width 6 — ns
T5 Clock and data rise time — 1 ns
T6 Clock and data fall time — 1 ns
T7 Data setup 2 — ns
T8 Data hold 0.7 — ns
Table 28. JTAG timing (continued)
ID Parameter
1,2
All frequencies
Unit
Min Max
!2-?42!#%?#,+
4
T4
T6
4
4