Datasheet

Electrical characteristics
i.MX 8QuadXPlus and 8DualXPlus Automotive and Infotainment Applications Processors, Rev. 0, 11/2018
PRELIMINARY NXP Semiconductors68
HS400 mode is the same as CMD input/output timing for SDR104 mode. Check SD5, SD6 and SD7
parameters in Table 61 SDR50/SDR104 Interface Timing Specification for CMD input/output timing for
HS400 mode.
Figure 30. HS400 timing
Table 59. HS400 interface timing specifications
ID Parameter Symbols Min Max Unit
Card Input clock
SD1 Clock Frequency fPP 0 200 Mhz
SD2 Clock Low Time t
CL
0.46 × t
CLK
0.54 × t
CLK
ns
SD3 Clock High Time t
CH
0.46 × t
CLK
0.54 × t
CLK
ns
uSDHC Output/Card inputs DAT (Reference to SCK)
SD4 Output Skew from Data of
Edge of SCK
t
OSkew1
0.45 ns
SD5 Output Skew from Edge of
SCK to Data
t
OSkew2
0.45 ns
uSDHC input/Card Outputs DAT (Reference to Strobe)
SD6 uSDHC input skew t
RQ
—0.45ns
SD7 uSDHC hold skew t
RQH
—0.45ns