Datasheet

Package information and contact assignments
i.MX 8QuadXPlus and 8DualXPlus Automotive and Infotainment Applications Processors, Rev. 0, 11/2018
PRELIMINARYNXP Semiconductors 141
The following table shows the DDR 17 x 17 mm pin function.
Table 115. i.MX 8QXP 17 x 17 mm DRAM pin function
Ball Name Ball LPDDR4 function DDR3L function
DDR_ATO W5 DDR_ATO DDR_ATO
DDR_CK0_N G3 DDR_CK0_N DDR_CK0_N
DDR_CK0_P H2 DDR_CK0_P DDR_CK0_P
DDR_CK1_N B8 DDR_CK1_N DDR_CK1_N
DDR_CK1_P A7 DDR_CK1_P DDR_CK1_P
DDR_DCF00 G5 CA2_A A5
DDR_DCF01 B2 CA4_A A6
DDR_DCF03 E3 CA5_A A7
DDR_DCF04 K6 / A8
DDR_DCF05 D4 / A9
DDR_DCF07 B4 / RAS#
DDR_DCF08 K2 CA3_A A3
DDR_DCF09 L3 ODT_CA_A ODT
DDR_DCF10 G1 CS0_A A1
DDR_DCF11 L1 CA0_A A0
DDR_DCF12 D2 CS1_A A2
DDR_DCF14 K4 CKE0_A /
DDR_DCF15 E1 CKE1_A /
DDR_DCF16 L7 CA1_A A4
DDR_DCF17 B6 CA4_B A12
DDR_DCF18 A5 RESET_N RESET_N
DDR_DCF19 H6 CA5_B A14
DDR_DCF20 D6 / A15
DDR_DCF21 B10 / BA0
DDR_DCF22 E5 / BA1
DDR_DCF23 L5 / BA2
DDR_DCF24 H4 / CAS#
DDR_DCF25 H10 ODT_CA_B ODT1
DDR_DCF26 A9 CA3_B A13
DDR_DCF27 E9 CA0_B A10
DDR_DCF28 D10 CS0_B CS_N[0]