Datasheet
Package information and contact assignments
i.MX 8QuadXPlus and 8DualXPlus Automotive and Infotainment Applications Processors, Rev. 0, 11/2018
PRELIMINARY NXP Semiconductors138
V22 MIPI_DSI0_I2C0_SDA VDD_MIPI_CSI_DIG_1P8 GPIO ALT0 MIPI_DSI0.I2C0.SDA Input PU(50K)
AG9 MIPI_DSI1_CLK_N VDD_MIPI_DSI1_1P8 DSI MIPI_DSI1.CKN
AJ9 MIPI_DSI1_CLK_P VDD_MIPI_DSI1_1P8 DSI MIPI_DSI1.CKP
AF8 MIPI_DSI1_DATA0_N VDD_MIPI_DSI1_1P8 DSI MIPI_DSI1.DN0
AH8 MIPI_DSI1_DATA0_P VDD_MIPI_DSI1_1P8 DSI MIPI_DSI1.DP0
AF10 MIPI_DSI1_DATA1_N VDD_MIPI_DSI1_1P8 DSI MIPI_DSI1.DN1
AH10 MIPI_DSI1_DATA1_P VDD_MIPI_DSI1_1P8 DSI MIPI_DSI1.DP1
AG7 MIPI_DSI1_DATA2_N VDD_MIPI_DSI1_1P8 DSI MIPI_DSI1.DN2
AJ7 MIPI_DSI1_DATA2_P VDD_MIPI_DSI1_1P8 DSI MIPI_DSI1.DP2
AG11 MIPI_DSI1_DATA3_N VDD_MIPI_DSI1_1P8 DSI MIPI_DSI1.DN3
AJ11 MIPI_DSI1_DATA3_P VDD_MIPI_DSI1_1P8 DSI MIPI_DSI1.DP3
Y28 MIPI_DSI1_I2C0_SCL VDD_MIPI_CSI_DIG_1P8 GPIO ALT0 MIPI_DSI1.I2C0.SCL Input PU(50K)
W25 MIPI_DSI1_I2C0_SDA VDD_MIPI_CSI_DIG_1P8 GPIO ALT0 MIPI_DSI1.I2C0.SDA Input PU(50K)
AJ25 ON_OFF_BUTTON VDD_SNVS_LDO_1P8_CAP ANA SNVS.ON_OFF_BUTTON
E11 PCIE_CTRL0_CLKREQ_B VDD_PCIE_DIG_1P8_3P3 GPIO ALT0 HSIO.PCIE0.CLKREQ_B Input PD(50K)
A11 PCIE_CTRL0_PERST_B VDD_PCIE_DIG_1P8_3P3 GPIO ALT0 HSIO.PCIE0.PERST_B Input PD(50K)
B14 PCIE_CTRL0_WAKE_B VDD_PCIE_DIG_1P8_3P3 GPIO ALT0 HSIO.PCIE0.WAKE_B Input PU(50K)
F12 PCIE_REF_QR VDD_PCIE_1P8 PCIE HSIO.PCIE_IOB.REF_QR
C13 PCIE_REFCLK100M_N VDD_PCIE_1P8 PCIE HSIO.PCIE_IOB.EXT_REFCLK10
0M_N
D14 PCIE_REFCLK100M_P VDD_PCIE_1P8 PCIE HSIO.PCIE_IOB.EXT_REFCLK10
0M_P
H12 PCIE_REXT VDD_PCIE0_1P0 PCIE HSIO.PCIE.REXT
G11 PCIE0_PHY_PLL_REF_RET
URN
VDD_PCIE_LDO_1P0_CAP PCIE HSIO.PCIE0.PLL_REF_RETURN
B16 PCIE0_RX0_N VDD_PCIE_LDO_1P0_CAP PCIE HSIO.PCIE0.RX0_N
A15 PCIE0_RX0_P VDD_PCIE_LDO_1P0_CAP PCIE HSIO.PCIE0.RX0_P
B12 PCIE0_TX0_N VDD_PCIE_LDO_1P0_CAP PCIE HSIO.PCIE0.TX0_N
A13 PCIE0_TX0_P VDD_PCIE_LDO_1P0_CAP PCIE HSIO.PCIE0.TX0_P
AC27 PMIC_I2C_SCL VDD_ANA1_1P8 SCU ALT0 SCU.PMIC_I2C.SCL Input PU(50K)
AE29 PMIC_I2C_SDA VDD_ANA1_1P8 SCU ALT0 SCU.PMIC_I2C.SDA Input PU(50K)
AA23 PMIC_INT_B VDD_ANA1_1P8 SCU ALT0 SCU.DSC.PMIC_INT_B Input PU(50K)
AB20 PMIC_ON_REQ VDD_SNVS_LDO_1P8_CAP ANA SNVS.PMIC_ON_REQ
AD28 POR_B VDD_ANA1_1P8 SCU ALT0 SCU.DSC.POR_B Input PU(50K)
Table 114. 17 x 17 mm functional contact assignments (continued)
Ball Ball Name Power Domain
Ball
Type
Reset Condition
Default
Mode
Default Function
Default
Direction
Default
Pull