Datasheet

Package information and contact assignments
i.MX 8QuadXPlus and 8DualXPlus Automotive and Infotainment Applications Processors, Rev. 0, 11/2018
PRELIMINARYNXP Semiconductors 123
The following table shows DDR pin function.
Table 112. DRAM pin function
Ball Name Ball LPDDR4 function DDR3L function
DDR_ATO AB8
DDR_CK0_N Y6 DDR_CK0_N DDR_CK0_N
DDR_CK0_P W5 DDR_CK0_P DDR_CK0_P
DDR_CK1_N N5 DDR_CK1_N DDR_CK1_N
DDR_CK1_P P6 DDR_CK1_P DDR_CK1_P
DDR_DCF00 W1 CA2_A A5
DDR_DCF01 U3 CA4_A A6
DDR_DCF03 U1 CA5_A A7
DDR_DCF04 U7 A8
DDR_DCF05 U5 A9
DDR_DCF07 T2 RAS#
DDR_DCF08 AB4 CA3_A A3
DDR_DCF09 AB6 ODT_CA_A ODT
DDR_DCF10 AC5 CS0_A A1
DDR_DCF11 W3 CA0_A A0
DDR_DCF12 Y8 CS1_A A2
DDR_DCF14 Y2 CKE0_A
DDR_DCF15 Y4 CKE1_A
DDR_DCF16 W7 CA1_A A4
DDR_DCF17 N3 CA4_B A12
DDR_DCF18 L1 RESET_N RESET_N
DDR_DCF19 N1 CA5_B A14
DDR_DCF20 P4 A15
DDR_DCF21 T8 BA0
DDR_DCF22 P2 BA1
DDR_DCF23 T4 BA2
DDR_DCF24 T6 CAS#
DDR_DCF25 K8 ODT_CA_B ODT1
DDR_DCF26 L7 CA3_B A13
DDR_DCF27 K4 CA0_B A10
DDR_DCF28 K6 CS0_B CS_N[0]