Datasheet
Package information and contact assignments
i.MX 8QuadXPlus and 8DualXPlus Automotive and Infotainment Applications Processors, Rev. 0, 11/2018
PRELIMINARYNXP Semiconductors 119
AB28 MIPI_DSI0_I2C0_SDA VDD_MIPI_DSI_DIG_1P8_3P3 GPIO ALT0 MIPI_DSI0.I2C0.SDA INPUT PU(50K)
AM16 MIPI_DSI1_CLK_N VDD_MIPI_DSI1_1P8 DSI MIPI_DSI1.CKN Hi-Z
AP16 MIPI_DSI1_CLK_P VDD_MIPI_DSI1_1P8 DSI MIPI_DSI1.CKP Hi-Z
AN15 MIPI_DSI1_DATA0_N VDD_MIPI_DSI1_1P8 DSI MIPI_DSI1.DN0 Hi-Z
AR15 MIPI_DSI1_DATA0_P VDD_MIPI_DSI1_1P8 DSI MIPI_DSI1.DP0 Hi-Z
AN17 MIPI_DSI1_DATA1_N VDD_MIPI_DSI1_1P8 DSI MIPI_DSI1.DN1 Hi-Z
AR17 MIPI_DSI1_DATA1_P VDD_MIPI_DSI1_1P8 DSI MIPI_DSI1.DP1 Hi-Z
AM14 MIPI_DSI1_DATA2_N VDD_MIPI_DSI1_1P8 DSI MIPI_DSI1.DN2 Hi-Z
AP14 MIPI_DSI1_DATA2_P VDD_MIPI_DSI1_1P8 DSI MIPI_DSI1.DP2 Hi-Z
AM18 MIPI_DSI1_DATA3_N VDD_MIPI_DSI1_1P8 DSI MIPI_DSI1.DN3 Hi-Z
AP18 MIPI_DSI1_DATA3_P VDD_MIPI_DSI1_1P8 DSI MIPI_DSI1.DP3 Hi-Z
AD30 MIPI_DSI1_GPIO0_00 VDD_MIPI_DSI_DIG_1P8_3P3 GPIO ALT0 MIPI_DSI1.GPIO0.IO00 INPUT PD(50K)
AF34 MIPI_DSI1_GPIO0_01 VDD_MIPI_DSI_DIG_1P8_3P3 GPIO ALT0 MIPI_DSI1.GPIO0.IO01 INPUT PD(50K)
AE33 MIPI_DSI1_I2C0_SCL VDD_MIPI_DSI_DIG_1P8_3P3 GPIO ALT0 MIPI_DSI1.I2C0.SCL INPUT PU(50K)
AC29 MIPI_DSI1_I2C0_SDA VDD_MIPI_DSI_DIG_1P8_3P3 GPIO ALT0 MIPI_DSI1.I2C0.SDA INPUT PU(50K)
AH28 ON_OFF_BUTTON VDD_SNVS_LDO_1P8_CAP ANA SNVS.ON_OFF_BUTTON
D10 PCIE_CTRL0_CLKREQ_B VDD_PCIE_DIG_1P8_3P3 GPIO ALT0 HSIO.PCIE0.CLKREQ_B INPUT PD(50K)
H10 PCIE_CTRL0_PERST_B VDD_PCIE_DIG_1P8_3P3 GPIO ALT0 HSIO.PCIE0.PERST_B INPUT PD(50K)
A11 PCIE_CTRL0_WAKE_B VDD_PCIE_DIG_1P8_3P3 GPIO ALT0 HSIO.PCIE0.WAKE_B INPUT PU(50K)
F12 PCIE_REF_QR VDD_PCIE_1P8 PCIE HSIO.PCIE_IOB.REF_QR
D12 PCIE_REFCLK100M_N VDD_PCIE_1P8 PCIE HSIO.PCIE_IOB.EXT_REFCLK100M_N
E11 PCIE_REFCLK100M_P VDD_PCIE_1P8 PCIE HSIO.PCIE_IOB.EXT_REFCLK100M_P
H12 PCIE_REXT VDD_PCIE0_1P0 PCIE HSIO.PCIE.REXT
G11 PCIE0_PHY_PLL_REF_RETURN VDD_PCIE_LDO_1P0_CAP PCIE HSIO.PCIE0.PLL_REF_RETURN
B12 PCIE0_RX0_N VDD_PCIE_LDO_1P0_CAP PCIE HSIO.PCIE0.RX0_N
A13 PCIE0_RX0_P VDD_PCIE_LDO_1P0_CAP PCIE HSIO.PCIE0.RX0_P
A9 PCIE0_TX0_N VDD_PCIE_LDO_1P0_CAP PCIE HSIO.PCIE0.TX0_N
B10 PCIE0_TX0_P VDD_PCIE_LDO_1P0_CAP PCIE HSIO.PCIE0.TX0_P
AJ35 PMIC_I2C_SCL VDD_ANA1_1P8 SCU ALT0 SCU.PMIC_I2C.SCL INPUT PU(50K)
AH32 PMIC_I2C_SDA VDD_ANA1_1P8 SCU ALT0 SCU.PMIC_I2C.SDA INPUT PU(50K)
AJ33 PMIC_INT_B VDD_ANA1_1P8 SCU ALT0 SCU.DSC.PMIC_INT_B INPUT PU(50K)
AR31 PMIC_ON_REQ VDD_SNVS_LDO_1P8_CAP ANA SNVS.PMIC_ON_REQ
AG31 POR_B VDD_ANA1_1P8 SCU ALT0 SCU.DSC.POR_B INPUT PU(50K)
AK14 QSPI0A_DATA0 VDD_QSPI0A_1P8_3P3 FASTD ALT0 LSIO.QSPI0A.DATA0 INPUT PD(50K)
AR13 QSPI0A_DATA1 VDD_QSPI0A_1P8_3P3 FASTD ALT0 LSIO.QSPI0A.DATA1 INPUT PD(50K)
Table 111. 21 x 21 mm functional contact assignments (continued)
Ball Ball Name Power Domain
Ball
Type
Reset Condition
Default
Mode
Default Function
Default
Direction
Default
Pull