Datasheet

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
A VSS_MAIN DDR_DQ31 DDR_DQ28
PCIE0_TX0
_N
PCIE_CTRL
0_WAKE_B
PCIE0_RX0
_P
USB_SS3_T
X_N
VSS_MAIN
USB_SS3_
RX_P
EMMC0_DA
TA1
EMMC0_DA
TA6
USDHC1_V
SELECT
USDHC1_D
ATA0
ENET0_RG
MII_TX_CTL
ENET0_RG
MII_RXD0
VSS_MAIN
B DDR_DQ30 DDR_DQ29 DDR_DQ16 VSS_MAIN
PCIE0_TX0
_P
PCIE0_RX0
_N
VSS_MAIN
USB_SS3_T
X_P
USB_SS3_
RX_N
VSS_MAIN
EMMC0_DA
TA4
USDHC1_R
ESET_B
USDHC1_D
ATA1
ENET0_RG
MII_TXD1
ENET0_RG
MII_RX_CT
L
ENET0_MDI
O
ESAI0_TX1
C VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN
USB_SS3_T
C3
VSS_MAIN VSS_MAIN
EMMC0_DA
TA0
VSS_MAIN
USDHC1_C
MD
VSS_MAIN
ENET0_RG
MII_RXD1
VSS_MAIN
ESAI0_TX3_
RX2
VSS_MAIN
D
DDR_DQS3
_P
DDR_DM2
DDR_DQS2
_P
DDR_DQ19
PCIE_CTRL
0_CLKREQ
_B
PCIE_REFC
LK100M_N
USB_OTG2
_REXT
USB_OTG2
_DN
USB_OTG1
_DP
EMMC0_C
MD
EMMC0_DA
TA7
USDHC1_W
P
USDHC1_D
ATA2
ENET0_RG
MII_RXC
ENET0_MD
C
ESAI0_TX0 SPDIF0_TX
E DDR_DM3
DDR_DQS3
_N
DDR_DQS2
_N
DDR_DQ18 DDR_DQ17
PCIE_REFC
LK100M_P
USB_SS3_
REXT
VSS_MAIN
USB_OTG2
_DP
USB_OTG1
_DN
EMMC0_DA
TA2
USDHC1_C
D_B
USDHC1_D
ATA3
ENET0_RG
MII_TXD2
VSS_MAIN
ESAI0_SCK
T
VSS_MAIN
SPDIF0_EX
T_CLK
F VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN
PCIE_REF_
QR
USB_SS3_T
C0
USB_OTG2
_ID
VSS_MAIN VSS_MAIN
EMMC0_ST
ROBE
VSS_MAIN
ENET0_RG
MII_TXD3
ENET0_RE
FCLK_125M
_25M
ESAI0_FSR
ESAI0_TX4_
RX1
SPI3_SDO
G DDR_DQ27 DDR_DQ26 DDR_DQ23 DDR_DQ20 DDR_ZQ
PCIE0_PHY
_PLL_REF_
RETURN
VDD_PCIE_
1P8
USB_SS3_T
C2
USB_OTG1
_ID
EMMC0_CL
K
EMMC0_DA
TA5
USDHC1_C
LK
ENET0_RG
MII_TXD0
ENET0_RG
MII_RXD2
ESAI0_FST SPDIF0_RX SPI3_SDI MCLK_IN0
H DDR_DQ24 DDR_DQ25 DDR_DQ22 DDR_DQ21
PCIE_CTRL
0_PERST_B
PCIE_REXT
USB_SS3_T
C1
USB_OTG2
_VBUS
USB_OTG1
_VBUS
EMMC0_DA
TA3
EMMC0_RE
SET_B
ENET0_RG
MII_TXC
ENET0_RG
MII_RXD3
ESAI0_SCK
R
VSS_MAIN SPI3_SCK UART1_TX
J VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN
ESAI0_TX5_
RX0
SPI3_CS0 VSS_MAIN SAI0_TXC
K
DDR_DCF2
9
DDR_DCF2
7
DDR_DCF2
8
DDR_DCF2
5
VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN
ESAI0_TX2_
RX3
SPI3_CS1
UART1_CT
S_B
SAI0_TXD
L
DDR_DCF1
8
DDR_DCF3
2
DDR_DCF3
1
DDR_DCF2
6
VSS_MAIN
VDD_PCIE_
DIG_1P8_3
P3
VDD_PCIE_
LDO_1P0_C
AP
VDD_USB_
3P3
VDD_USB_
OTG_1P0
VDD_EMM
C0_1P8_3P
3
VDD_USDH
C1_VSELE
CT_1P8_3P
3
VDD_ENET
0_VSELECT
_1P8_2P5_3
P3
VDD_ENET
_MDIO_1P8
_3P3
VSS_MAIN
MCLK_OUT
0
UART1_RX SAI0_TXFS SAI1_RXC
M VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN
VDD_DDR_
VDDQ
VDD_ANA0
_1P8
VDD_USB_
SS3_LDO_1
P0_CAP
VDD_USB_
1P8
VDD_EMM
C0_VSELE
CT_1P8_3P
3
VDD_USDH
C1_1P8_3P
3
VDD_ENET
0_1P8_2P5_
3P3
VSS_MAIN MCLK_IN1 VSS_MAIN SAI1_RXD SAI0_RXD
N
DDR_DCF1
9
DDR_DCF1
7
DDR_CK1_
N
DDR_DCF3
0
VDD_DDR_
VDDQ
VDD_DDR_
VDDQ
VSS_MAIN VDD_MAIN VSS_MAIN VDD_MAIN VSS_MAIN VDD_GPU
VDD_ESAI_
SPDIF_1P8
_2P5_3P3
VSS_MAIN
UART1_RT
S_B
SPI2_SDI VSS_MAIN SAI1_RXFS
P
DDR_DCF2
2
DDR_DCF2
0
DDR_CK1_
P
DDR_DCF3
3
VSS_MAIN VDD_MAIN VSS_MAIN VDD_MAIN VSS_MAIN VDD_GPU VDD_GPU VDD_MAIN VSS_MAIN SPI2_CS0 SPI0_SCK SPI2_SDO SPI0_SDI
R VSS_MAIN VSS_MAIN VSS_MAIN
VDD_DDR_
VDDQ
VSS_MAIN
VDD_DDR_
VDDQ
VDD_MAIN VSS_MAIN VDD_MAIN VSS_MAIN VDD_GPU VSS_MAIN
VDD_SPI_M
CLK_UART
_1P8_3P3
VSS_MAIN SPI2_SCK SPI0_SDO SPI0_CS0 SPI0_CS1
T
DDR_DCF0
7
DDR_DCF2
3
DDR_DCF2
4
DDR_DCF2
1
VSS_MAIN
VDD_DDR_
VDDQ
VDD_MAIN VSS_MAIN VDD_MAIN VSS_MAIN VDD_GPU VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN
U
DDR_DCF0
3
DDR_DCF0
1
DDR_DCF0
5
DDR_DCF0
4
VSS_MAIN
VDD_DDR_
VDDQ
VSS_MAIN VDD_MAIN VSS_MAIN VDD_MAIN VSS_MAIN VDD_GPU
VDD_SPI_S
AI_1P8_3P3
VSS_MAIN
ADC_VREF
H
ADC_VREF
L
ADC_IN1 ADC_IN0
V VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VDD_MAIN VSS_MAIN VDD_MAIN VSS_MAIN VDD_GPU VSS_MAIN VDD_MAIN VSS_MAIN
VDD_ADC_
1P8
ADC_IN3 ADC_IN2 ADC_IN5
W
DDR_DCF0
0
DDR_DCF1
1
DDR_CK0_
P
DDR_DCF1
6
VSS_MAIN
VDD_DDR_
VDDQ
VDD_MAIN VSS_MAIN VDD_MAIN VSS_MAIN VDD_GPU VSS_MAIN
VDD_ADC_
DIG_1P8
VSS_MAIN ADC_IN4 VSS_MAIN VSS_MAIN VSS_MAIN
Y
DDR_DCF1
4
DDR_DCF1
5
DDR_CK0_
N
DDR_DCF1
2
VSS_MAIN
VDD_DDR_
VDDQ
VDD_MAIN VSS_MAIN VDD_MAIN VSS_MAIN VDD_MAIN
VDD_CAN_
UART_1P8_
3P3
VSS_MAIN VSS_MAIN VSS_MAIN
FLEXCAN0_
TX
FLEXCAN0_
RX
AA VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN
VDD_DDR_
VDDQ
VDD_DDR_
VDDQ
VSS_MAIN VDD_A35 VDD_A35 VDD_A35 VSS_MAIN VDD_MAIN
VDD_MIPI_
DSI_DIG_1
P8_3P3
VSS_MAIN UART0_TX
FLEXCAN2_
TX
FLEXCAN1_
RX
FLEXCAN1_
TX
AB DDR_DQ14
DDR_DCF0
8
DDR_DCF0
9
DDR_ATO VSS_MAIN VDD_MAIN VSS_MAIN VDD_A35 VDD_A35 VDD_A35 VSS_MAIN
VDD_ANA1
_1P8
VSS_MAIN
MIPI_DSI0_I
2C0_SDA
VSS_MAIN UART0_RX
FLEXCAN2_
RX
AC DDR_DQ15 DDR_DQ12
DDR_DCF1
0
DDR_DTO0
VDD_DDR_
PLL_1P8
VDD_DDR_
VDDQ
VDD_MAIN VSS_MAIN VDD_MAIN VSS_MAIN VDD_MAIN VSS_MAIN
VDD_SNVS
_4P2
VSS_MAIN
MIPI_DSI1_I
2C0_SDA
MIPI_DSI0_I
2C0_SCL
VSS_MAIN UART2_TX
AD VSS_MAIN VSS_MAIN VSS_MAIN DDR_VREF VSS_MAIN
VDD_DDR_
VDDQ
VDD_MAIN
VDD_MIPI_
1P8
VDD_MIPI_
1P0
VSS_MAIN VDD_MAIN
VDD_TMPR
_CSI_1P8_3
P3
VSS_MAIN
JTAG_TRST
_B
MIPI_DSI1_
GPIO0_00
MIPI_DSI0_
GPIO0_00
UART2_RX
AE
DDR_DQS1
_N
DDR_DQ13 DDR_DQ01 DDR_DTO1 VSS_MAIN
VDD_DDR_
VDDQ
VDD_QSPI0
B_1P8_3P3
VDD_QSPI0
A_1P8_3P3
VDD_MIPI_
1P8
VDD_MIPI_
1P0
VDD_MIPI_
CSI_DIG_1
P8
VDD_CSI_1
P8_3P3
VDD_SNVS
_LDO_1P8_
CAP
VSS_MAIN
TEST_MOD
E_SELECT
JTAG_TCK
MIPI_DSI1_I
2C0_SCL
MIPI_DSI0_
GPIO0_01
AF
DDR_DQS1
_P
DDR_DM1 DDR_DQ00 DDR_DQ03 VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN
SCU_GPIO0
_00
VSS_MAIN JTAG_TDO
MIPI_DSI1_
GPIO0_01
AG VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN
SCU_PMIC_
STANDBY
POR_B VSS_MAIN JTAG_TMS
AH DDR_DQ10 DDR_DQ11
DDR_DQS0
_N
DDR_DQ02
QSPI0B_SS
0_B
QSPI0A_DA
TA3
VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN
ON_OFF_B
UTTON
SCU_GPIO0
_01
PMIC_I2C_
SDA
JTAG_TDI
AJ DDR_DQ08 DDR_DQ09
DDR_DQS0
_P
DDR_DM0
QSPI0B_SS
1_B
QSPI0B_DA
TA2
QSPI0A_DA
TA2
MIPI_DSI0_
DATA3_N
MIPI_DSI0_
DATA1_N
MIPI_DSI0_
CLK_N
MIPI_DSI0_
DATA0_N
MIPI_DSI0_
DATA2_N
CSI_D06 CSI_D03
SCU_BOOT
_MODE3
SCU_BOOT
_MODE0
PMIC_INT_
B
PMIC_I2C_
SCL
AK VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN
QSPI0B_DQ
S
QSPI0A_SS
1_B
QSPI0A_DA
TA0
MIPI_DSI0_
DATA3_P
MIPI_DSI0_
DATA1_P
MIPI_DSI0_
CLK_P
MIPI_DSI0_
DATA0_P
MIPI_DSI0_
DATA2_P
CSI_PCLK CSI_D00 VSS_MAIN
SCU_BOOT
_MODE1
ANA_TEST_
OUT_N
AL DDR_DQ32 DDR_DQ34 DDR_DQ06 DDR_DQ07
QSPI0B_DA
TA1
QSPI0A_DQ
S
VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN CSI_VSYNC CSI_D01
SCU_BOOT
_MODE2
VSS_MAIN
ANA_TEST_
OUT_P
AM DDR_DQ33 DDR_DQ04 DDR_DQ05
QSPI0B_DA
TA3
QSPI0B_DA
TA0
QSPI0A_SS
0_B
MIPI_DSI1_
DATA2_N
MIPI_DSI1_
CLK_N
MIPI_DSI1_
DATA3_N
MIPI_CSI0_
DATA1_N
MIPI_CSI0_
DATA0_N
MIPI_CSI0_I
2C0_SDA
CSI_MCLK CSI_D07 CSI_D05
RTC_XTAL
O
XTALO
AN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN VSS_MAIN
MIPI_DSI1_
DATA0_N
MIPI_DSI1_
DATA1_N
MIPI_CSI0_
DATA3_N
MIPI_CSI0_
CLK_N
MIPI_CSI0_
DATA2_N
MIPI_CSI0_
MCLK_OUT
VSS_MAIN CSI_D04 VSS_MAIN
VSS_SCU_
XTAL
VSS_SCU_
XTAL
AP DDR_DQ35
DDR_DQS4
_P
DDR_DM4 DDR_DQ36 DDR_DQ37
QSPI0A_SC
LK
MIPI_DSI1_
DATA2_P
MIPI_DSI1_
CLK_P
MIPI_DSI1_
DATA3_P
MIPI_CSI0_
DATA1_P
MIPI_CSI0_
DATA0_P
MIPI_CSI0_
GPIO0_01
MIPI_CSI0_I
2C0_SCL
CSI_EN CSI_D02 RTC_XTALI XTALI
AR VSS_MAIN
DDR_DQS4
_N
DDR_DQ39 DDR_DQ38
QSPI0B_SC
LK
QSPI0A_DA
TA1
MIPI_DSI1_
DATA0_P
MIPI_DSI1_
DATA1_P
MIPI_CSI0_
DATA3_P
MIPI_CSI0_
CLK_P
MIPI_CSI0_
DATA2_P
MIPI_CSI0_
GPIO0_00
CSI_RESET CSI_HSYNC
PMIC_ON_
REQ
VSS_SCU_
XTAL
i.
MX 8QuadXPlus/8DualXPlus Automotive and Infotainment Applications Processors, Rev. 0, 11/2018
NXP Semiconductors
113
PRELIMINARY
Package information and functional contact assignments for FCPBGA, 21 x 21 mm, 0.8 mm pitch