Datasheet

i.MX 8M Dual / 8M QuadLite / 8M Quad Applications Processors Data Sheet for Industrial Products, Rev. 0, 01/2018
88 NXP Semiconductors
Package information and contact assignments
5.1.3 i.MX 8M Dual / 8M QuadLite / 8M Quad 17 x 17 mm 0.65 mm pitch ball
map
Table 83 shows the i.MX 8M Dual / 8M QuadLite / 8M Quad 17 x 17 mm, 0.65 mm pitch ball map.
XTALI_25M U25 VDDA ANALOG
XTALI_27M V25 VDDA ANALOG
XTALO_25M U24 VDDA ANALOG
XTALO_27M V24 VDDA ANALOG
1
The state immediately after RESET and before ROM firmware or software has executed.
2
The state during, after reset, and before ROM firmware or software has executed.
3
Jtag Active output during reset
4
INT_BOOT output (High) during reset
5
Boot Configure Input
Table 83. 17 x 17 mm, 0.65 mm pitch ball map
1 2 3 4 5 6 7 8 9 10111213141516171819202122232425
A
VSS
SAI_MCLK
ECSPI1_MOSI
ECSPI2_SS0
UART3_RXD
UART1_TXD
USB2_RX_P
USB2_TX_P
USB2_DP
USB1_RESREF
USB1_RX_P
USB1_TX_P
USB1_DP
MIPI_DSI_D3_N
MIPI_DSI_D1_N
MIPI_DSI_D0_N
MIPI_DSI_D2_N
MIPI_CSI2_CLK_N
MIPI_CSI2_D1_N
MIPI_CSI2_D2_N
MIPI_CS1_CLK_N
MIPI_CSI1_D0_N
VSS
B
VSS
SAI1_TXD2
SAI1_TXD6
ECSPI1_MISO
ECSPI2_MISO
UART2_RXD
UART3_TXD
USB2_RX_N
USB2_TX_N
USB2_DN
USB2_RESREF
USB1_RX_N
USB1_TX_N
USB1_DN
MIPI_DSI_D3_P
MIPI_DSI_D1_P
MIPI_DSI_D0_P
MIPI_DSI_D2_P
MIPI_CSI2_CLK_P
MIPI_CSI2_D1_P
MIPI_CSI2_D2_P
MIPI_CSI1_CLK_P
MIPI_CSI1_D0_P
MIPI_CSI1_D2_N
VSS
C
SAI1_TXD7
SAI1_TXD5
SAI3_TXD
SAI3_TXC
ECSPI2_SCLK
UART4_RXD
UART1_RXD
VSS
USB2_ID
VSS
USB2_VPTX
USB1_VPTX
VSS
USB1_ID
VSS
MIPI_DSI_CLK_N
MIPI_DSI_REXT
MIPI_VDDHA
MIPI_CSI2_D3_N
MIPI_CSI2_D0_N
MIPI_CSI1_D3_N
MIPI_CSI1_D1_N
MIPI_CSI1_D2_P
VSS
PCIE2_RESREF
Table 82. i.MX 8M Dual / 8M QuadLite / 8M Quad 17 x 17 mm functional contact assignments (continued)
Ball name Ball Power group Ball type
1
Reset condition
2
Default
mode
(Reset
mode)
Default function
(Signal name)
Input/
Output
Value