Datasheet

i.MX 8M Dual / 8M QuadLite / 8M Quad Applications Processors Data Sheet for Industrial Products, Rev. 0, 01/2018
66 NXP Semiconductors
Electrical characteristics
3.9.13.2.1 UART transmitter
Figure 42 depicts the transmit timing of UART in the RS-232 Serial mode, with 8 data bit/1 stop bit
format. Table 69 lists the UART RS-232 Serial mode transmit timing characteristics.
Figure 42. UART RS-232 Serial mode transmit timing diagram
3.9.13.2.2 UART receiver
Figure 43 depicts the RS-232 Serial mode receive timing with 8 data bit/1 stop bit format. Table 70 lists
Serial mode receive timing characteristics.
Figure 43. UART RS-232 Serial mode receive timing diagram
Table 69. RS-232 Serial mode transmit timing parameters
ID Parameter Symbol Min Max Unit
UA1 Transmit Bit Time t
Tbit
1/F
baud_rate
1
- T
ref_clk
2
1
F
baud_rate
: Baud rate frequency. The maximum baud rate the UART can support is (ipg_perclk frequency)/16.
2
T
ref_clk
: The period of UART reference clock ref_clk (ipg_perclk after RFDIV divider).
1/F
baud_rate
+ T
ref_clk
—
Table 70. RS-232 Serial mode receive timing parameters
ID Parameter Symbol Min Max Unit
UA2 Receive Bit Time
1
1
The UART receiver can tolerate 1/(16 x F
baud_rate
) tolerance in each bit. But accumulation tolerance in one frame must not
exceed 3/(16 x F
baud_rate
).
t
Rbit
1/F
baud_rate
2
- 1/(16
x F
baud_rate
)
2
F
baud_rate
: Baud rate frequency. The maximum baud rate the UART can support is (ipg_perclk frequency)/16.
1/F
baud_rate
+
1/(16 x F
baud_rate
)
—
Start
Bit
Bit 1 Bit 2Bit 0 Bit 4 Bit 5 Bit 6
Bit 7
UARTx_TX_DATA
(output)
Bit 3
STOP
BIT
Next
Start
Bit
Possible
Parity
Bit
Par Bit
UA1
UA1
UA1
UA1
Bit 1 Bit 2Bit 0 Bit 4 Bit 5 Bit 6
Bit 7
UARTx_RX_DATA
(output)
Bit 3
Start
Bit
STOP
BIT
Next
Start
Bit
Possible
Parity
Bit
Par Bit
UA2 UA2
UA2
UA2