Datasheet

Electrical characteristics
i.MX 8M Dual / 8M QuadLite / 8M Quad Applications Processors Data Sheet for Industrial Products, Rev. 0, 01/2018
NXP Semiconductors 61
3.9.10.2 DDR mode
Figure 35. QuadSPI input/read timing (DDR mode with internal sampling)
Figure 36. QuadSPI input/read timing (DDR mode with loopback DQS sampling)
NOTE
• For internal sampling, the timing values assume using sample point 0,
that is QuadSPIx_SMPR[SDRSMP] = 0.
Table 62. QuadSPI input/read timing (DDR mode with internal sampling)
Symbol Parameter
Value
Unit
Min Max
T
IS
Setup time for incoming data 8.67 — ns
T
IH
Hold time requirement for incoming data 0 — ns
Table 63. QuadSPI input/read timing (DDR mode with loopback DQS sampling)
Symbol Parameter
Value
Unit
Min Max
T
IS
Setup time for incoming data 2 — ns
T
IH
Hold time requirement for incoming data 1 — ns
7,6 7,+
7
,6
7
,+
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