Datasheet

Electrical characteristics
i.MX 8M Dual / 8M QuadLite / 8M Quad Applications Processors Data Sheet for Industrial Products, Rev. 0, 01/2018
NXP Semiconductors 57
3.9.7.3 MIPI LP-RX specifications
3.9.7.4 MIPI LP-CD specifications
3.9.7.5 MIPI DC specifications
5
When the output voltage is between 15% and 85% of the fully settled LP signal levels.
6
Measured as average across any 50 mV segment of the output signal transition.
7
This value represents a corner point in a piecewise linear curve.
Table 54. MIPI low power receiver DC specifications
Symbol Parameter Min Typ Max Unit
V
IH
Logic 1 input voltage 880 — 1.3 mV
V
IL
Logic 0 input voltage, not in ULP state — — 550 mV
V
IL-ULPS
Logic 0 input voltage, ULP state — — 300 mV
V
HYST
Input hysteresis 25 — — mV
Table 55. MIPI low power receiver AC specifications
Symbol Parameter Min Typ Max Unit
e
SPIKE
1,2
1
Time-voltage integration of a spike above V
IL
when in LP-0 state or below V
IH
when in LP-1 state.
2
An impulse below this value will not change the receiver state.
Input pulse rejection — — 300 V.ps
T
MIN-RX
3
3
An input pulse greater than this value shall toggle the output.
Minimum pulse width response 20 0 0 ns
V
INT
Peak Interference amplitude — — 200 mV
f
INT
Interference frequency 450 — — MHz
Table 56. MIPI contention detector DC specifications
Symbol Parameter Min Typ Max Unit
V
IHCD
Logic 1 contention threshold 450 — — mV
V
ILCD
Logic 0 contention threshold — — 200 mV
Table 57. MIPI input characteristics DC specifications
Symbol Parameter Min Typ Max Unit
V
PIN
Pad signal voltage range -50 — 1350 mV
I
LEAK
1
Pin leakage current -10 — 10 A
V
GNDSH
Ground shift -50 — 50 mV