Datasheet

Electrical characteristics
i.MX 8M Dual / 8M QuadLite / 8M Quad Applications Processors Data Sheet for Industrial Products, Rev. 0, 01/2018
NXP Semiconductors 55
— HBR2: 1.62 x4 x 8 / 10 = 17.28 Gbps
Bandwidth required per resolution (CEA-861-F):
— 1920 x 1080 (24 b/px) 60 fps: 3.56 Gbps
— 3840 x 2160 (24 b/px) 30 fps: 7.13 Gbps
— 3840 x 2160 (24 b/px) 30 fps: 14.26 Gbps
• Embedded DisplayPort 1.4 standard (VESA.org)
— eDP link rates: R216 (2.16 Gbps), R243 (2.43 Gbps), R324 (3.24 Gbps), and R432 (4.32 Gbps)
— Fast Link Training is also supported
DDC link requires external pull-up resistors to be connected to a 5 V supply. The following table provides
the range for those pull-ups.
3.9.6 I
2
C bus characteristics
The Inter-Integrated Circuit (I2C) provides functionality of a standard I2C master and slave. The I2C is
designed to be compatible with the I2C Bus Specification, version 2.1, by Philips Semiconductor (now
NXP Semiconductors).
3.9.7 MIPI D-PHY timing parameters
This section describes MIPI D-PHY electrical specifications.
3.9.7.1 MIPI HS-TX specifications
Table 49. Pull-up resistors for DDC link
Ball Name Min Typ Max Unit
HDMI_TX0_DDC_SCL 1.5 — 2 K

HDMI_TX0_DDC_SDA 1.5 — 2 K
Table 50. MIPI high-speed transmitter DC specifications
Symbol Parameter Min Typ Max Unit
V
CMTX
1
1
Value when driving into load impedance anywhere in the Z
ID
range.
High Speed Transmit Static Common Mode Voltage 150 200 250 mV
|
V
CMTX
|
(1,0)
V
CMTX
mismatch when Output is Differential-1 or Differential-0 — — 3 mV
|V
OD
|
1
High Speed Transmit Differential Voltage 140 200 270 mV
|V
OD
|V
OD
mismatch when Output is Differential-1 or Differential-0 — — 12 mV
V
OHHS
1
High Speed Output High Voltage — — 360 mV
Z
OS
Single Ended Output Impedance 40 50 62.5


Z
OS
Single Ended Output Impedance Mismatch — — 10 %