Datasheet

Electrical characteristics
i.MX 8M Dual / 8M QuadLite / 8M Quad Applications Processors Data Sheet for Industrial Products, Rev. 0, 01/2018
NXP Semiconductors 53
Figure 30. Toggle mode data read timing
Table 48. Toggle mode timing parameters
1
ID Parameter Symbol
Timing
T = GPMI Clock Cycle
Unit
Min. Max.
NF1 NAND_CLE setup time tCLS (AS + DS)  T - 0.12 [see note
2
s
,3
]
NF2 NAND_CLE hold time tCLH DH  T - 0.72 [see note
2
]
NF3 NAND_CE0_B setup time tCS (AS + DS)  T - 0.58 [see notes
,2
]
NF4 NAND_CE0_B hold time tCH DH  T - 1 [see note
2
]
NF5 NAND_WE_B pulse width tWP DS  T [see note
2
]
NF6 NAND_ALE setup time tALS (AS + DS)  T - 0.49 [see notes
,2
]
NF7 NAND_ALE hold time tALH DH  T - 0.42 [see note
2
]
NF8 Command/address NAND_DATAxx setup time tCAS DS  T - 0.26 [see note
2
]
NF9 Command/address NAND_DATAxx hold time tCAH DH  T - 1.37 [see note
2
]
NF18 NAND_CEx_B access time tCE CE_DELAY  T [see notes
4,2
]—ns
NF22 clock period tCK — — ns
NF23 preamble delay tPRE PRE_DELAY  T [see notes
5,2
]— ns
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