Datasheet

i.MX 8M Dual / 8M QuadLite / 8M Quad Applications Processors Data Sheet for Industrial Products, Rev. 0, 01/2018
38 NXP Semiconductors
Electrical characteristics
3.9.1.2 ECSPI Slave mode timing
Figure 10 depicts the timing of ECSPI in Slave mode. Table 38 lists the ECSPI Slave mode timing
characteristics.
Figure 10. ECSPI Slave mode timing diagram
Table 38. ECSPI Slave mode timing parameters
ID Parameter Symbol Min Max Unit
CS1 ECSPIx_SCLK Cycle Time–Read
ECSPI_SCLK Cycle Time–Write
t
clk
25
125
—ns
CS2 ECSPIx_SCLK High or Low Time–Read
ECSPIx_SCLK High or Low Time–Write
t
SW
12.5
62.5
—ns
CS4 ECSPIx_SS_B pulse width t
CSLH
Half ECSPIx_SCLK period — ns
CS5 ECSPIx_SS_B Lead Time (CS setup time) t
SCS
5—ns
CS6 ECSPIx_SS_B Lag Time (CS hold time) t
HCS
5—ns
CS7 ECSPIx_MOSI Setup Time t
Smosi
4—ns
CS8 ECSPIx_MOSI Hold Time t
Hmosi
4—ns
CS9 ECSPIx_MISO Propagation Delay (C
LOAD
=20pF) t
PDmiso
419ns
CS1
CS7
CS8
CS2
CS2
CS4
CS6
CS5
CS9
ECSPIx_SCLK
ECSPIx_SS_B
ECSPIx_MISO
ECSPIx_MOSI