Datasheet
i.MX 8M Dual / 8M QuadLite / 8M Quad Applications Processors Data Sheet for Industrial Products, Rev. 0, 01/2018
32 NXP Semiconductors
Electrical characteristics
3.6.2 Clock I/O AC parameters—CLKx_N/CLKx_P
The differential output transition time waveform is shown in Figure 5.
Figure 5. Differential LVDS driver transition time waveform
111 00 7 x Slow Slew 2.9 3.1
111 11 7 x Fast Slew 1.8 2.3
Table 32. Maximum frequency of operation for input
Maximum frequency (MHz)
VDD = 1.8 V, CL = 15 pF, fast — VDD = 3.3 V, CL = 20 pF, fast
200 — 160
Table 31. Output cell delay time for fixed load (continued)
Parameter
Simulated Cell Delay A PAD (ns)
VDD = 1.62 V, T = 125°C VDD = 2.97 V, T = 125°C
dse[2:0] fsel[1:0] Driver Type CL = 15 pF CL = 15 pF
YGGL
9
9R K
9R O
LSSBGR
SDGQ
9
9GLIIHUHQWLDO
SDGS
9RG SDGSSDGQ
7SOKG
7SKOG
7WOK
7WKO