Datasheet

i.MX 8M Dual / 8M QuadLite / 8M Quad introduction
i.MX 8M Dual / 8M QuadLite / 8M Quad Applications Processors Data Sheet for Industrial Products, Rev. 0, 01/2018
NXP Semiconductors 3
Multimedia Video Processing Unit:
• 4Kp60 HEVC/H.265 main, and main 10 decoder
• 4Kp60 VP9 decoder
• 4Kp30 AVC/H.264 decoder
• 1080p60 MPEG-2, MPEG-4p2, VC-1, VP8, RV9, AVS, MJPEG, H.263 decoder
Graphic Processing Unit:
• 4 shader
• 267 million triangles/sec
• 1.6 Giga pixel/sec
• 32 GFLOPs 32-bit or 64 GFLOPs 16-bit
• Support OpenGL ES 1.1, 2.0, 3.0, 3.1, Open CL 1.2, and Vulkan
HDMI Display Interface:
• HDMI 2.0a supporting one display: resolution up to 4096 x 2160 at 60 Hz, support
HDCP 2.2 and HDCP 1.4
1
• 20+ Audio interfaces 32-bit @ 384 kHz fs, with Time Division Multiplexing (TDM)
support
• S/PDIF input and output
• Audio Return Channel (ARC) on HDMI
• Upscale HD graphics to 4K for display
• Downscale 4K video to HD for display
• Display Port
• Embedded Display Port
MIPI-DSI Display Interface:
• MIPI-DSI 4 channels supporting one display, resolution up to 1920 x 1080 at 60 Hz
• LCDIF display controller
• Output can be LCDIF output or DC display controller output
Audio:
• S/PDIF input and output
• Five synchronous audio interface (SAI) modules supporting I2S, AC97, TDM, and
codec/DSP interfaces, including one SAI with 16 Tx and 16 Rx channels, one SAI
with 8 Tx and 8 Rx channels, and three SAI with 2 Tx and 2 Rx channels
• One SAI for 8 Tx channels for HDMI output audio
• One S/PDIF input for HDMI ARC input
Camera inputs:
• Two MIPI-CSI2 camera inputs (4-lane each)
Security Resource Domain Controller (RDC) supports four domains and up to eight regions
Arm TrustZone (TZ) architecture
On-chip RAM (OCRAM) secure region protection using OCRAM controller
High Assurance Boot (HAB)
Cryptographic acceleration and assurance (CAAM) module
Secure non-volatile storage (SNVS): Secure real-time clock (RTC)
Secure JTAG controller (SJC)
Table 1. Features (continued)
Subsystem Feature