Datasheet
Electrical characteristics
i.MX 8M Dual / 8M QuadLite / 8M Quad Applications Processors Data Sheet for Industrial Products, Rev. 0, 01/2018
NXP Semiconductors 21
3.1.7 USB PHY Suspend current consumption
3.1.7.1 Low power Suspend Mode
The VBUS Valid comparators and their associated bandgap circuits are enabled by default. Table 11
shows the USB interface current consumption in Suspend mode with default settings.
3.1.7.2 Power-Down modes
Table 12 shows the USB interface current consumption with only the OTG block powered down.
In Power-Down mode, everything is powered down, including the USB_VBUS valid comparators and
their associated bandgap circuity in typical condition. Table 13 shows the USB interface current
consumption in Power-Down mode.
3.1.8 PCIe PHY 2.1 DC electrical characteristics
Table 11. USB PHY current consumption in Suspend mode
1
1
Low Power Suspend is enabled by setting USBx_PORTSC1 [PHCD]=1 [Clock Disable (PLPSCD)].
USB1_VDD33 USB2_VDD33
Current
154 154
Table 12. USB PHY current consumption in Sleep mode
1
1
VBUS Valid comparators can be disabled through software by setting USBNC_OTG*_PHY_CFG2[OTGDISABLE0] to 1. This
signal powers down only the VBUS Valid comparator, and does not control power to the Session Valid Comparator, ADP
Probe and Sense comparators, or ID detection circuitry.
USB1_VDD33 USB2_VD33
Current
520 520
Table 13. USB PHY current consumption in Power-Down mode
1
1
The VBUS Valid Comparators and their associated bandgap circuits can be disabled through software by setting
USBNC_OTG*_PHY_CFG2[OTGDISABLE0] to 1 and USBNC_OTG*_PHY_CFG2[DRVVBUS0] to 0, respectively.
USB1_VDD33 USB2_VDD33
Current
146 146