Datasheet

Modules list
i.MX 8M Dual / 8M QuadLite / 8M Quad Applications Processors Data Sheet for Industrial Products, Rev. 0, 01/2018
NXP Semiconductors 11
SAI1
SAI2
SAI3
SAI4
SAI5
SAI6
Synchronous Audio Interface The SAI module provides a synchronous audio interface (SAI) that
supports full duplex serial interfaces with frame synchronization,
such as I2S, AC97, TDM, and codec/DSP interfaces.
SDMA Smart Direct Memory Access The SDMA is a multichannel flexible DMA engine. It helps in
maximizing system performance by offloading the various cores in
dynamic data routing. It has the following features:
• Powered by a 16-bit Instruction-Set micro-RISC engine
• Multi channel DMA supporting up to 32 time-division multiplexed
DMA channels
• 48 events with total flexibility to trigger any combination of
channels
• Memory accesses including linear, FIFO, and 2D addressing
• Shared peripherals between Arm and SDMA
• Very fast Context-Switching with 2-level priority based preemptive
multi tasking
• DMA units with auto-flush and prefetch capability
• Flexible address management for DMA transfers (increment,
decrement, and no address changes on source and destination
address)
• DMA ports can handle unidirectional and bidirectional flows (Copy
mode)
• Up to 8-word buffer for configurable burst transfers for EMIv2.5
• Support of byte-swapping and CRC calculations
• Library of Scripts and API is available
SJC Secure JTAG Controller The SJC provides JTAG interface (designed to be compatible with
JTAG TAP standards) to internal logic. The i.MX 8M Dual / 8M
QuadLite / 8M Quad processors use JTAG port for production,
testing, and system debugging. Additionally, the SJC provides BSR
(Boundary Scan Register) standard support, designed to be
compatible with IEEE 1149.1 and IEEE 1149.6 standards.
The JTAG port must be accessible during platform initial laboratory
bring-up, for manufacturing tests and troubleshooting, as well as for
software debugging by authorized entities. The SJC of the i.MX 8M
Dual / 8M QuadLite / 8M Quad incorporates three security modes for
protecting against unauthorized accesses. Modes are selected
through eFUSE configuration.
SNVS Secure Non-Volatile Storage Secure Non-Volatile Storage, including Secure Real Time Clock,
Security State Machine, Master Key Control, and Violation/Tamper
Detection and reporting.
SPDIF1
SPDIF2
Sony Philips Digital
Interconnect Format
A standard audio file transfer format, developed jointly by the Sony
and Phillips corporations. It supports Transmitter and Receiver
functionality.
TEMPSENSOR Temperature Sensor Temperature sensor
TZASC Trust-Zone Address Space
Controller
The TZASC (TZC-380 by Arm) provides security address region
control functions required for intended application. It is used on the
path to the DRAM controller.
Table 3. i.MX 8M Dual / 8M QuadLite / 8M Quad modules list (continued)
Block mnemonic Block name Brief description