Datasheet

MC33411A/B
37
MOTOROLA RF/IF DEVICE DATA
Table 9. Register
Map
Table 10. Register
Map: Power–Up
Defaults
0111 7
Volume Control Tx Gain Adjust Rx Gain Adjust
RSSI &
Batt. A/D
Disable
0001
0010
0011
0100
0101
0110
0111
Reg
Add
Reg
Num
MSB
Bit 23
LSB
Bit 0
Bit 22 Bit 21 Bit 20 Bit 19 Bit 18 Bit 17 Bit 16 Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1
1
2
3
4
5
6
7
Tx
Polarity
Select
Rx
Polarity
Select
Tx PD
Cur Sel
Rx PD
Cur Sel
MSB
MSB
LSB
LSB
LSB
LSB
13–Bit Tx N Counter Divide Value
13–Bit Rx N’ Counter Divide Value
MSB
MSB
VB Voltage Reference Adjust
FTxMC/
FRxMC
Mode
LO2
Polarity
Select
2nd LO
PD Cur
Sel
LSB
14–Bit 2nd LO Counter Divide ValueMSB
Test Modes LO2 Capacitor Select 6–Bit Switched Capacitor Filter Counter Divide V
alue MSB
LSB
12–Bit Reference Counter Divide Value
6–Bit Battery Voltage A/D Output
6–Bit RSSI A/D Output
MCU Clock Divide Select Volume Control Tx Gain Adjust Rx Gain Adjust
Side Tone
Attenuate Select
Unused Register
Bits
Data
Slicer
Invert
Data
Slicer
Disable
Tx Audio
Disable
Rx Audio
Disable
Power
Amp
Disable
2nd LO
PLL
Disable
Rx PLL
Disable
Tx PLL
Disable
Ref Osc
Disable*
ALC Gain
= 25
ALC Gain
= 10
Comp.
Low Max.
Gain En.
MCU Clk
Disable*
ALC
Disable
Limiter
Disable
Compres–
ser Pass–
through
Expander
Pass–
through
Tx Mute Rx Mute
Power
Amp
Mute
7–Bit Tx A Counter Divide Value
7–Bit Rx A’ Counter Divide Value
RSSI &
Batt. A/D
Disable
0001
0010
0011
0100
0101
0110
Reg
Add
Reg
Num
MSB
Bit 23
LSB
Bit 0
Bit 22 Bit 21 Bit 20 Bit 19 Bit 18 Bit 17 Bit 16 Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1
1
2
3
4
5
6
Tx
Polarity
Select
Rx
Polarity
Select
Tx PD
Cur Sel
Rx PD
Cur Sel
MSB
MSB
LSB
LSB
LSB
LSB
13–Bit Tx N Counter Divide Value
13–Bit Rx N’ Counter Divide Value
MSB
MSB
VB Voltage Reference Adjust
FTxMC/
FRxMC
Mode
LO2
Polarity
Select
2nd LO
PD Cur
Sel
LSB
14–Bit 2nd LO Counter Divide ValueMSB
Test Modes LO2 Capacitor Select 6–Bit Switched Capacitor Filter Counter Divide V
alue MSB
LSB
12–Bit Reference Counter Divide Value
6–Bit Battery Voltage A/D Output
6–Bit RSSI A/D Output
Side Tone
Attenuate Select
Unused Register
Bits
Data
Slicer
Invert
Data
Slicer
Disable
Tx Audio
Disable
Rx Audio
Disable
Power
Amp
Disable
2nd LO
PLL
Disable
Rx PLL
Disable
Tx PLL
Disable
Ref Osc
Disable*
ALC Gain
= 25
ALC Gain
= 10
Comp.
Low Max.
Gain En.
MCU Clk
Disable*
ALC
Disable
Limiter
Disable
Compres–
ser Pass–
through
Expander
Pass–
through
Tx Mute Rx Mute
Power
Amp
Mute
7–Bit Tx A Counter Divide Value
7–Bit Rx A’ Counter Divide Value
001000 00000000010 00000
001000 00000000010 00000
01110 00 100000000 00 000
000010 00001000000 00000
000000000000
0000000000000
01101110111101111
00
Table 9. Register Map
Table 10. Register Map: Power–Up Defaults
* These bits not included in ”B” version.
* These bits not included in ”B” version.
MCU Clock Divide Select
ARCHIVE INFORMATION
ARCHIVE INFORMATION
Fr
eescale S
emiconduct
or
, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...