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MC33411A/B

MOTOROLA RF/IF DEVICE DATA

By choosing a value for ω

and Q

, T1 and T2 can be

calculated. The choice of Q

determines the stability of the

loop. In general, choosing a phase margin of 45 degrees is a

good choice to start calculations. Choosing lower phase

margins will provide somewhat faster lock–times, but also

generate higher overshoots on the control line to the VCO.

This will present a less stable system. Larger values of phase

margin provide a more stable system, but also increase

lock–times. The practical range for phase margin is 30

degrees up to 70 degrees.

The selection of ω

is strongly related to the desired

lock–time. Since it is quite complicated to accurately

calculate lock time, a good first order approach is:

T_lock

[

(12)

Equation (12) only provides an order of magnitude for lock

time. It does not clearly define what the exact frequency

difference is from the desired frequency and it does not show

the effect of phase margin. It assumes, however, that the

phase detector steps up to the desired control voltage

without hesitation. In practice, such step response approach

is not really valid. If the two input frequencies are not locked,

their phase maybe momentarily zero and force the phase

detector into a high impedance mode. Hence, the lock times

may be found to be somewhat higher.

In general, ω

should be chosen far below the reference

frequency in order for the filter to provide sufficient

attenuation at that frequency. In some applications, the

reference frequency might represent the spacing between

channels. Any feedthrough to the VCO that shows up as a

spur might affect adjacent channel rejection. In theory, with

the loop in lock, there is no signal coming from the phase

detector. But in practice small current pulses and leakage

currents will be supplied to both the VCO and the phase

detector. The external capacitors may show some leakage,

too. Hence, the lower ω

, the better the reference frequency

is filtered, but the longer it takes for the loop to lock.

As shown in Figure 48, the open loop gain at ω

is 1 (or

0 dB), and thus the absolute value of the complex open loop

gain as shown in equation (6) solves C1:

)

(13)

With C1 known, and equation (5) solve C2 and R2:

(14)

(15)

The VCO gain is dependent on the selection of the

external inductor and the frequency required. The free

running frequency of the VCO is determined by:

(16)

In which L represents the external inductor value and C

represents the total capacitance (including internal

capacitance) in parallel with the inductor. The VCO gain can

be easily calculated via the internal varicap transfer curve

shown in Figure 43.

As can be derived from Figure 43, the varicap capacitance

changes 2.0 pF over the voltage range from 1.0 V to 3.0 V:

Cvar

2.0 pF

2.0 V

(17)

Combining (16) with (17) the VCO gain can be determined

by:

j2.0V

)

Cvar

(18)

Although the basic loopfilter previously described provides

adequate performance for most applications, an extra pole

may be added for additional reference frequency filtering.

Given that the channel spacing is based on the reference

frequency, and any feedthrough to the first LO may effect

parameters like adjacent channel rejection and

intermodulation. Figure 49 shows a loopfilter architecture

incorporating an additional pole.

From

Phase

Detector

To VCO

C2C1

Figure 49. Loop Filter

with Additional Integrating Element

For the additional pole formed by R3 and C3 to be efficient,

the cut–off frequency must be much lower than the reference

frequency. However, it must also be higher than ω

in order

not to compromise phase margin too much. The following

equations were derived in a similar manner as for the basic

filter previously described.

ARCHIVE INFORMATION

eescale S

emiconduct

, I

Freescale Semiconductor, Inc.

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