Datasheet

NXP Semiconductors 23
10XS3435
Figure 6. Bulb cooling management
Figure 7. Input timing switching characteristics
I
OCH
1
t
B
C5
t
B
C4
t
B
C2
t
B
C1
Previous OFF duration
(toff)
I
OCH2
I
OC1
I
OC3
I
OC4
I
OCLO4
I
OCLO3
I
OC2
t
B
C3
t
B
C6
I
OCLO2
I
OCLO1
SI
RSTB
CSB
SCLK
Don’t Care
Don’t Care Don’t Care
Valid
Valid
VIH
VIL
VIH
VIH
VIH
VIL
VIL
VIL
TwRSTB
Tlead
TwSCLKh
TrSI
Tlag
TSIsu
TwSCLKl
TSI(hold)
TfSI
0.7 VDD
0.2 VDD
0.7VDD
0.2VDD
0.2VDD
0.7VDD
0.7VDD
TCSB
TENBL
RST
SCLK
SI
CS
10% V
DD
t
W
RST
t
ENBL
10% V
DD
t
LEAD
t
WSCLKH
t
RSI
90% V
DD
10% V
DD
90% V
DD
10% V
DD
t
SI(SU)
t
WSCLKl
t
SI(HOLD)
t
FSI
90% V
DD
t
CS
t
LAG
V
IH
V
IH
V
IL
V
IL
V
IH
V
IL
V
IH
V
IH