Datasheet

LPC84x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 1.7 — 27 February 2018 9 of 97
NXP Semiconductors
LPC84x
32-bit Arm Cortex-M0+ microcontroller
Fig 6. Pin configuration HVQFN48 package
aaa-026596
PIO0_9/XTALOUT
PIO1_0/CAPT_X1
PIO0_11/I2C0_SDA
PIO0_8/XTALIN
SWDIO/PIO0_2/TMS PIO1_5/CAPT_X6
PIO0_31/CAPT_X0 PIO1_6/CAPT_X7
SWDCLK/PIO0_3/TCK VDD
PIO0_28/WKTCLKIN VSS
PIO0_4/ADC_11/TRST/WAKEUP VREFN
PIO0_5/RESET VREFP
PIO0_12 PIO0_7/ADC_0
PIO1_9/CAPT_YH PIO0_6/ADC_1/ACMPV
REF
PIO0_13/ADC_10 PIO1_7/CAPT_X8
PIO1_8/CAPT_YL PIO0_0/ACMPIN_I1/TDO
PIO0_10/I2C0_SCL
PIO1_01/CAPT_X2
PIO0_16
PIO1_2/CAPT_X3
PIO0_27 PIO0_26 PIO0_25 PIO0_24
PIO1_3/CAPT_X4
PIO0_15
PIO1_4/CAPT_X5
PIO0_1/ACMP_I2/CLKIN/TDI
PIO0_17/ADC_9/DACOUT_0 PIO0_18/ADC_8 PIO0_19/ADC_7 PIO0_20/ADC_6 PIO0_21/ADC_5 PIO0_22/ADC_4 PIO0_30/ACMP_I5 VSSA VDDA PIO0_23/ADC_3/ACMP_I4 PIO0_29/DACOUT_1 PIO0_14/ADC_2/ACMP_I3
Transparent top view
12 25
11 26
10 27
9 28
8 29
7 30
6 31
5 32
4 33
3 34
2 35
1 36
13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37
terminal 1
index area