Datasheet

LPC84x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 1.7 — 27 February 2018 80 of 97
NXP Semiconductors
LPC84x
32-bit Arm Cortex-M0+ microcontroller
14.4 I/O power consumption
I/O pins are contributing to the overall dynamic and static power consumption of the part.
If pins are configured as digital inputs, a static current can flow depending on the voltage
level at the pin and the setting of the internal pull-up and pull-down resistors. This current
can be calculated using the parameters R
pu
and R
pd
given in Ta bl e 15 for a given input
voltage V
I
. For pins set to output, the current drive strength is given by parameters I
OH
and
I
OL
in Ta bl e 15 , but for calculating the total static current, you also need to consider any
external loads connected to the pin.
I/O pins also contribute to the dynamic power consumption when the pins are switching
because the V
DD
supply provides the current to charge and discharge all internal and
external capacitive loads connected to the pin in addition to powering the I/O circuitry.
The contribution from the I/O switching current I
sw
can be calculated as follows for any
given switching frequency f
sw
if the external capacitive load (C
ext
) is known (see Table 15
for the internal I/O capacitance):
I
sw
= V
DD
x f
sw
x (C
io
+ C
ext
)
14.5 Termination of unused pins
Tabl e 34 shows how to terminate pins that are not used in the application. In many cases,
unused pins may should be connected externally or configured correctly by software to
minimize the overall power consumption of the part.
Unused pins with GPIO function should be configured as outputs set to LOW with their
internal pull-up disabled. To configure a GPIO pin as output and drive it LOW, select the
GPIO function in the IOCON register, select output in the GPIO DIR register, and write a 0
to the GPIO PORT register for that pin. Disable the pull-up in the pin’s IOCON register.
In addition, it is recommended to configure all GPIO pins that are not bonded out on
smaller packages as outputs driven LOW with their internal pull-up disabled.
[1] I = Input, O = Output, IA = Inactive (no pull-up/pull-down enabled), F = floating, PU = Pull-Up.
Table 34. Termination of unused pins
Pin Default
state
[1]
Recommended termination of unused pins
RESET
/PIO0_5 I; PU In an application that does not use the RESET pin or its GPIO function, the
termination of this pin depends on whether deep power-down mode is used:
• Deep power-down used: Connect an external pull-up resistor and keep pin in
default state (input, pull-up enabled) during all other power modes.
• Deep power-down not used and no external pull-up connected: can be left
unconnected if internal pull-up is disabled and pin is driven LOW and
configured as output by software.
all PIOn_m (not
open-drain)
I; PU Can be left unconnected if driven LOW and configured as GPIO output with pull-up
disabled by software.
PIOn_m (I2C open-drain) IA Can be left unconnected if driven LOW and configured as GPIO output by software.
VREFP - Tie to VDD.
VREFN - Tie to VSS.