Datasheet

LPC84x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 1.7 — 27 February 2018 69 of 97
NXP Semiconductors
LPC84x
32-bit Arm Cortex-M0+ microcontroller
13. Characteristics of analog peripherals
13.1 BOD
[1] Interrupt levels are selected by writing the level value to the BOD control register BODCTRL, see the
LPC84x user manual. Interrupt level 0 is reserved.
Table 26. BOD static characteristics
[1]
T
amb
=25
C.
Symbol Parameter Conditions Min Typ Max Unit
V
th
threshold voltage interrupt level 1
assertion - 2.25 - V
de-assertion - 2.38 - V
interrupt level 2
assertion - 2.55 - V
de-assertion - 2.66 - V
interrupt level 3
assertion - 2.84 - V
de-assertion - 2.92 - V
reset level 0
assertion - 1.84 - V
de-assertion - 1.97 - V
reset level 1
assertion - 2.05 - V
de-assertion - 2.18 - V
reset level 2
assertion - 2.35 - V
de-assertion - 2.47 - V
reset level 3
assertion - 2.63 - V
de-assertion - 2.76 - V