Datasheet
LPC84x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 1.7 — 27 February 2018 62 of 97
NXP Semiconductors
LPC84x
32-bit Arm Cortex-M0+ microcontroller
12.6 I
2
C-bus
[1] See the I
2
C-bus specification UM10204 for details.
[2] Parameters are valid over operating temperature range unless otherwise specified.
[3] t
HD;DAT
is the data hold time that is measured from the falling edge of SCL; applies to data in transmission
and the acknowledge.
[4] A device must internally provide a hold time of at least 300 ns for the SDA signal (with respect to the
V
IH
(min) of the SCL signal) to bridge the undefined region of the falling edge of SCL.
[5] C
b
= total capacitance of one bus line in pF.
[6] The maximum t
f
for the SDA and SCL bus lines is specified at 300 ns. The maximum fall time for the SDA
output stage t
f
is specified at 250 ns. This allows series protection resistors to be connected in between the
SDA and the SCL pins and the SDA/SCL bus lines without exceeding the maximum specified t
f
.
[7] In Fast-mode Plus, fall time is specified the same for both output stage and bus timing. If series resistors
are used, designers should allow for this when considering bus timing.
Table 22. Dynamic characteristic: I
2
C-bus pins
[1]
T
amb
=
40
C to +105
C; values guaranteed by design.
[2]
Symbol Parameter Conditions Min Max Unit
f
SCL
SCL clock
frequency
Standard-mode 0 100 kHz
Fast-mode 0 400 kHz
Fast-mode Plus; on
pins PIO0_10 and
PIO0_11
01MHz
t
f
fall time
[4][5][6][7]
of both SDA and
SCL signals
Standard-mode
- 300 ns
Fast-mode 20 + 0.1 C
b
300 ns
Fast-mode Plus;
on pins PIO0_10
and PIO0_11
- 120 ns
t
LOW
LOW period of
the SCL clock
Standard-mode 4.7 - s
Fast-mode 1.3 - s
Fast-mode Plus; on
pins PIO0_10 and
PIO0_11
0.5 - s
t
HIGH
HIGH period of
the SCL clock
Standard-mode 4.0 - s
Fast-mode 0.6 - s
Fast-mode Plus; on
pins PIO0_10 and
PIO0_11
0.26 - s
t
HD;DAT
data hold time
[3][4][8]
Standard-mode 0 - s
Fast-mode 0 - s
Fast-mode Plus; on
pins PIO0_10 and
PIO0_11
0-s
t
SU;DAT
data set-up
time
[9][10]
Standard-mode 250 - ns
Fast-mode 100 - ns
Fast-mode Plus; on
pins PIO0_10 and
PIO0_11
50 - ns