Datasheet
LPC84x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 1.7 — 27 February 2018 52 of 97
NXP Semiconductors
LPC84x
32-bit Arm Cortex-M0+ microcontroller
11.4 Peripheral power consumption
The supply current per peripheral is measured as the difference in supply current between
the peripheral block enabled and the peripheral block disabled in the SYSAHBCLKCFG
and PDRUNCFG (for analog blocks) registers. All other blocks are disabled in both
registers and no code accessing the peripheral is executed. Measured on a typical
sample at T
amb
=25 C.
The supply currents are shown for FRO clock frequencies of 12 MHz and 30 MHz.
Table 14. Power consumption for individual analog and digital blocks
Peripheral Typical supply current in μA Notes
System clock frequency =
n/a 12 MHz 30 MHz
FRO 89 - - System oscillator running; PLL off;
independent of main clock frequency; FRO =
24 MHz. FRO output disabled.
System oscillator at 12 MHz 243 - - FRO running; PLL off; independent of main
clock frequency.
Watchdog oscillator 1 - - FRO; PLL off; independent of main clock
frequency.
BOD 42 - - Independent of main clock frequency.
Flash 273 - - -
Main PLL 156 - - FRO (24 MHz) running; Main clock running at
fro_div (12 MHz)
CLKOUT - 25 61 Main clock divided by 4 in the CLKOUTDIV
register. Not connected to pin.
ROM - 35 86 -
GPIO + pin interrupt/pattern
match
- 159 384 GPIO pins configured as outputs and set to
LOW. Direction and pin state are maintained if
the GPIO is disabled in the SYSAHBCLKCFG
register.
SWM - 85 206 -
IOCON - 80 193 -
SCTimer/PWM - 172 419 -
CTimer 51 123
MRT - 102 245 -
WWDT - 28 70 -
I2C0 - 54 131 -
I2C1 - 47 115 -
I2C2 - 44 106 -
I2C3 - 60 145 -
SPI0 - 43 106 -
SPI1 - 44 107 -
USART0 - 53 128 -
USART1 - 53 130 -
USART2 - 46 90 -