Datasheet

LPC84x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 1.7 — 27 February 2018 38 of 97
NXP Semiconductors
LPC84x
32-bit Arm Cortex-M0+ microcontroller
8.27.6 Wake-up process
The LPC84x begin operation at power-up by using the FRO as the clock source allowing
chip operation to resume quickly. If the SysOsc, the external clock source, or the PLL are
needed by the application, software must enable these features and wait for them to
stabilize before they are used as a clock source.
Table 8. Wake-up sources for reduced power modes
power mode Wake-up source Conditions
Sleep Any interrupt Enable interrupt in NVIC.
RESET
pin PIO0_5 Enable the reset function in the PINENABLE0 register via switch matrix.
Deep-sleep and
power-down
Pin interrupts Enable pin interrupts in NVIC and STARTERP0 registers.
BOD interrupt
Enable interrupt in NVIC and STARTERP1 registers.
Enable interrupt in BODCTRL register.
BOD powered in PDSLEEPCFG register.
BOD reset
Enable reset in BODCTRL register.
BOD powered in PDSLEEPCFG register.
WWDT interrupt
Enable interrupt in NVIC and STARTERP1 registers.
WWDT running. Enable WWDT in WWDT MOD register and feed.
Enable interrupt in WWDT MOD register.
WDOsc powered in PDSLEEPCFG register.
WWDT reset
WWDT running.
Enable reset in WWDT MOD register.
WDOsc powered in PDSLEEPCFG register.
Self-Wake-up Timer
(WKT) time-out
Enable interrupt in NVIC and STARTERP1 registers.
Enable low-power oscillator in the DPDCTRL register in the PCON block.
Select low-power clock for WKT clock in the WKT CTRL register.
Start the WKT by writing a time-out value to the WKT COUNT register.
Interrupt from
USART/SPI/I2C
peripheral
Enable interrupt in NVIC and STARTERP1 registers.
Enable USART/I2C/SPI interrupts.
Provide an external clock signal to the peripheral.
Configure the USART in synchronous slave mode and I2C and SPI in
slave mode.
RESET
pin PIO0_5 Enable the reset function in the PINENABLE0 register via switch matrix.
Interrupt from
Capacitive Touch
peripheral
Enable interrupt in NVIC and STARTERP1 registers.
Enable the Capacitive Touch interrupt.
Switch FCLK clock source to the WDOsc.
Set Capacitive Touch registers.
Provide a touch event to the peripheral.
Deep power-down WAKEUP
pin PIO0_4 Enable the WAKEUP function in the DPDCTRL register in the PMU.
RESET
pin PIO0_5 Enable the reset function in the DPDCTRL register in the PMU to allow
wake-up in deep power-down mode.
WKT time-out
Enable the low-power oscillator in the DPDCTRL register in the PMU.
Enable the low-power oscillator to keep running in deep power-down mode
in the DPDCTRL register in the PMU.
Select low-power clock for WKT clock in the WKT CTRL register.
Start WKT by writing a time-out value to the WKT COUNT register.