Datasheet

Product data sheet Rev. 1.7 — 27 February 2018 32 of 97

NXP Semiconductors

LPC84x

32-bit Arm Cortex-M0+ microcontroller

The internal low-power 10 kHz ( 40% accuracy) oscillator serves as the clock input to the

WKT. This oscillator can be configured to run in all low-power modes.

8.27.2 Clock input

An external clock source can be supplied on the selected CLKIN pin directly to the PLL

input. When selecting a clock signal for the CLKIN pin, follow the specifications for digital

I/O pins in Table 13 “

Static characteristics, supply pins” and Table 19 “Dynamic

characteristics: I/O pins

[1]

”.

An 1.8 V external clock source can be supplied on the XTALIN pins to the system

oscillator limiting the voltage of this signal (see Section 14.2 “

XTAL oscillator”).

The maximum frequency for both clock signals is 25 MHz.

8.27.3 System PLL

The PLL accepts an input clock frequency in the range of 10 MHz to 25 MHz. The input

frequency is multiplied up to a high frequency with a Current Controlled Oscillator (CCO).

The multiplier can be an integer value from 1 to 32. The CCO operates in the range of

156 MHz to 320 MHz, so there is an additional divider in the loop to keep the CCO within

its frequency range while the PLL is providing the desired output frequency. The output

divider may be set to divide by 2, 4, 8, or 16 to produce the output clock. Since the

minimum output divider value is 2, it is insured that the PLL output has a 50 % duty cycle.

The PLL is turned off and bypassed following a chip reset and may be enabled by

software. The program must configure and activate the PLL, wait for the PLL to lock, and

then connect to the PLL as a clock source. The PLL settling time is nominally 100 s.

8.27.4 Clock output

The LPC84x features a clock output function that routes the FRO, the SysOsc, the

watchdog oscillator, or the main clock to the CLKOUT function. The CLKOUT function can

be connected to any digital pin through the switch matrix.