Datasheet
LPC84x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 1.7 — 27 February 2018 31 of 97
NXP Semiconductors
LPC84x
32-bit Arm Cortex-M0+ microcontroller
• Supports CPU PIO or DMA back-to-back transfer.
• Accept any size of data width per write: 8, 16 or 32-bit.
– 8-bit write: 1-cycle operation.
– 16-bit write: 2-cycle operation (8-bit x 2-cycle).
– 32-bit write: 4-cycle operation (8-bit x 4-cycle).
8.27 Clocking and power control
8.27.1 Crystal and internal oscillators
The LPC84x include four independent oscillators:
1. The crystal oscillator (SysOsc) operating at frequencies between 1 MHz and 25 MHz.
2. Free Running Oscillator.
3. Watchdog Oscillator
4. Low Power Oscillator
Each oscillator, except the low-frequency oscillator, can be used for more than one
purpose as required in a particular application.
Following reset, the LPC84x operates from the FRO until switched by software allowing
the part to run without any external crystal and the bootloader code to operate at a known
frequency.
See Figure 11
for an overview of the LPC84x clock generation.
8.27.1.1 Free Running Oscillator (FRO)
The FRO oscillator provides the default clock at reset and provides a clean system clock
shortly after the supply pins reach operating voltage.
• This oscillator provides a selectable 18 MHz, 24 MHz, and 30 MHz outputs that can
be used as a system clock. Also, these outputs can be divided down to 1.125 MHz,
1.5 MHz, 1.875 MHz, 9 MHz, 12 MHz, and 15 MHz for system clock.
• The FRO is trimmed to ±1 % accuracy over the entire voltage and temperature range
of 0 C to 70 C.
• By default, the fro_oscout is 24 MHz and is divided by 2 to provide a default system
(CPU) clock frequency of 12 MHz.
8.27.1.2 Crystal Oscillator (SysOsc)
The crystal oscillator can be used as the clock source for the CPU, with or without using
the PLL.
The SysOsc operates at frequencies of 1 MHz to 25 MHz. This frequency can be boosted
to a higher frequency, up to the maximum CPU operating frequency, by the system PLL.
8.27.1.3 Internal Low-power Oscillator and Watchdog Oscillator (WDOsc)
The nominal frequency of the WDOsc is programmable between 9.4 kHz and 2.3 MHz.
The frequency spread over silicon process variations is 40%.
The WDOsc is a dedicated oscillator for the windowed WWDT.