Datasheet

Product data sheet Rev. 1.7 — 27 February 2018 28 of 97

NXP Semiconductors

LPC84x

32-bit Arm Cortex-M0+ microcontroller

• Selectable time period from (T

cy(WDCLK)

 256  4) to (T

cy(WDCLK)

 2

 4) in

multiples of T

cy(WDCLK)

 4.

• The WatchDog Clock (WDCLK) is generated by the dedicated watchdog oscillator

(WDOSC).

8.22 Self-Wake-up Timer (WKT)

The self-wake-up timer is a 32-bit, loadable down counter. Writing any non-zero value to

this timer automatically enables the counter and launches a count-down sequence. When

the counter is used as a wake-up timer, this write can occur prior to entering a reduced

power mode.

8.22.1 Features

• 32-bit loadable down counter. Counter starts automatically when a count value is

loaded. Time-out generates an interrupt/wake up request.

• The WKT resides in a separate, always-on power domain.

• The WKT supports three clock sources: an external clock on the WKTCLKIN pin, the

low-power oscillator, and the FRO. The low-power oscillator is located in the

always-on power domain, so it can be used as the clock source in deep power-down

mode.

• The WKT can be used for waking up the part from any reduced power mode,

including deep power-down mode, or for general-purpose timing.

8.23 Analog comparator (ACMP)

The analog comparator with selectable hysteresis can compare voltage levels on external

pins and internal voltages.

After power-up and after switching the input channels of the comparator, the output of the

voltage ladder must be allowed to settle to its stable value before it can be used as a

comparator reference input. Settling times are given in Tab le 29

The analog comparator output is a movable function and is assigned to a pin through the

switch matrix. The comparator inputs and the voltage reference are enabled through the

switch matrix.