Datasheet
LPC84x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 1.7 — 27 February 2018 13 of 97
NXP Semiconductors
LPC84x
32-bit Arm Cortex-M0+ microcontroller
PIO0_14/
ACMP_I3/ADC_2
49 37 37 25
[2]
I; PU IO PIO0_14 — General-purpose port 0 input/output 14.
A ACMP_I3 — Analog comparator common input 3.
A ADC_2 — ADC input 2.
PIO0_15 30 22 22 15
[5]
I; PU IO PIO0_15 — General-purpose port 0 input/output 15.
PIO0_16 19 15 15 10
[4]
I; PU IO PIO0_16 — General-purpose port 0 input/output 16.
PIO0_17/ADC_9/
DACOUT_0
63 48 48 32
[2]
I; PU IO PIO0_17 — General-purpose port 0 input/output 17.
A ADC_9 — ADC input 9.
A DACOUT_0 — DAC Output 0.
PIO0_18/ADC_8 61 47 47 31
[2]
I; PU IO PIO0_18 — General-purpose port 0 input/output 18.
A ADC_8 — ADC input 8.
PIO0_19/ADC_7 60 46 46 30
[2]
I; PU IO PIO0_19 — General-purpose port 0 input/output 19.
A ADC_7 — ADC input 7.
PIO0_20/ADC_6 58 45 45 29
[2]
I; PU IO PIO0_20 — General-purpose port 0 input/output 20.
A ADC_6 — ADC input 6.
PIO0_21/ADC_5 57 44 44 28
[2]
I; PU IO PIO0_21 — General-purpose port 0 input/output 21.
A ADC_5 — ADC input 5.
PIO0_22/ADC_4 55 43 43 27
[2]
I; PU IO PIO0_22 — General-purpose port 0 input/output 22.
A ADC_4 — ADC input 4.
PIO0_23/ADC_3/
ACMP_I4
51 39 39 26
[2]
I; PU IO PIO0_23 — General-purpose port 0 input/output 23.
A ADC_3 — ADC input 3.
A ACMP_I4 — Analog comparator common input 4.
PIO0_24 28 20 20 14
[5]
I; PU IO PIO0_24 — General-purpose port 0 input/output 24.
In ISP mode, this is the U0_RXD pin.
PIO0_25 27 19 19 13
[5]
I; PU IO PIO0_25 — General-purpose port 0 input/output 25.
In ISP mode, this pin is the U0_TXD pin.
PIO0_26 23 18 18 12
[5]
I; PU IO PIO0_26 — General-purpose port 0 input/output 26.
PIO0_27 21 17 17 11
[5]
I; PU IO PIO0_27 — General-purpose port 0 input/output 27.
PIO0_28/
WKTCLKIN
10 7 7 5
[3]
I; PU IO PIO0_28 — General-purpose port 0 input/output 28.
This pin can host an external clock for the
self-wake-up timer. To use the pin as a self-wake-up
timer clock input, select the external clock in the
wake-up timer CTRL register. The external clock
input is active in all power modes, including deep
power-down.
PIO0_29/
DACOUT_1
50 38 38 -
[5]
I; PU IO PIO0_29 — General-purpose port 0 input/output 29.
A DACOUT_1 — DAC output 1.
PIO0_30/ACMP_I5 54 42 42 -
[5]
I; PU IO PIO0_30 — General-purpose port 0 input/output 30.
A ACMP_I5 — Analog comparator common input 5.
Table 4. Pin description
Symbol
LQFP64
LQFP48
HVQFN48
HVQFN33
Reset
state
[1]
Type Description