Datasheet

LPC84x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 1.7 — 27 February 2018 10 of 97
NXP Semiconductors
LPC84x
32-bit Arm Cortex-M0+ microcontroller
7.2 Pin description
The pin description table shows the pin functions that are fixed to specific pins on each
package. See Tab le 4
. These fixed-pin functions are selectable through the switch matrix
between GPIO and the comparator, ADC, SWD, RESET
, and the XTAL pins. By default,
the GPIO function is selected except on pins PIO0_2, PIO0_3, and PIO0_5. JTAG
functions are available in boundary scan mode only.
Movable functions for the I
2
C, USART, SPI, CTimer, SCT pins, and other peripherals can
be assigned through the switch matrix to any pin that is not power or ground in place of
the pin’s fixed functions.
The following exceptions apply:
Do not assign more than one output to any pin. However, an output and/or one or more
inputs can be assigned to a pin. Once any function is assigned to a pin, the pin’s GPIO
functionality is disabled.
Pin PIO0_4 triggers a wake-up from deep power-down mode. If the part must wake up
from deep power-down mode via an external pin, do not assign any movable function to
this pin.
Fig 7. Pin configuration HVQFN33 package
aaa-026595
Transparent top view
PIO0_9/XTALOUT
SWDIO/PIO0_2/TMS
PIO0_11/I2C0_SDA
PIO0_8/XTALIN
SWCLK/PIO0_3/TCK VDD
PIO0_28/WKTCLKIN VREFN
PIO0_4/ADC_11/TRST/WAKEUP VREFP
PIO0_5/RESET PIO0_7/ADC_0
PIO0_12 PIO0_6/ADC_1/ACMPV
REF
PIO0_13/ADC_10 PIO0_0/ACMP_I1/TDO
PIO0_10/I2C0_SCL
PIO0_16 PIO0_27 PIO0_26 PIO0_25 PIO0_24 PIO0_15
PIO0_1/ACMP_I2/CLKINTDI
PIO0_17/ADC_9/DACOUT_0 PIO0_18/ADC_8 PIO0_19/ADC_7 PIO0_20/ADC_6 PIO0_21/ADC_5 PIO0_22/ADC_4 PIO0_23/ADC_3/ACMP_I4 PIO0_14/ACMP_I3/ADC_2
8 17
7 18
6 19
5 20
21
3
4
22
2 23
1 24
9
10 11 12 13 14 15 16
32 31 30 29 28 27 26 25
terminal 1
index area
33 V
SS