Datasheet

LPC55S6x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2019. All rights reserved.
Product data sheet Rev. 1.0 — 26 February 2019 94 of 123
NXP Semiconductors
LPC55S6x
32-bit ARM Cortex-M33 microcontroller
T
cy(clk)
= CCLK/DIVVAL with CCLK = system clock frequency. DIVVAL is the SPI clock divider. See the LPC55S6x User
manual.
Fig 22. SPI master timing
SCK (CPOL = 0)
MOSI (CPHA = 1)
SSEL
MISO (CPHA = 1)
T
cy(clk)
t
DS
t
DH
t
v(Q)
DATA VALID (LSB) DATA VALID
t
v(Q)
SCK (CPOL = 1)
DATA VALID (LSB)
DATA VALID
MOSI (CPHA = 0)
MISO (CPHA = 0)
t
DS
t
DH
DATA VALID (MSB) DATA VALID (MSB)DATA VALID
DATA VALID (LSB)
DATA VALID (LSB)
t
v(Q)
DATA VALID (MSB)
DATA VALID
t
v(Q)
aaa-014969
DATA VALID (MSB)
DATA VALID (MSB)
DATA VALID (MSB)
DATA VALID (MSB)
IDLE
IDLE
IDLE
IDLE
DATA VALID (MSB)