Datasheet
LPC55S6x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2019. All rights reserved.
Product data sheet Rev. 1.0 — 26 February 2019 61 of 123
NXP Semiconductors
LPC55S6x
32-bit ARM Cortex-M33 microcontroller
• Any of the eight selected PLU outputs can be enabled to contribute to an
asynchronous wake-up or an interrupt request from sleep and deep-sleep modes.
7.28.3 CRC engine
The Cyclic Redundancy Check (CRC) generator with programmable polynomial settings
supports several CRC standards commonly used. To save system power and bus
bandwidth, the CRC engine supports DMA transfers.
7.28.3.1 Features
• Supports three common polynomials CRC-CCITT, CRC-16, and CRC-32.
– CRC-CCITT: x
16
+ x
12
+ x
5
+ 1
– CRC-16: x
16
+ x
15
+ x
2
+ 1
– CRC-32: x
32
+ x
26
+ x
23
+ x
22
+ x
16
+ x
12
+ x
11
+ x
10
+ x
8
+ x
7
+ x
5
+ x
4
+ x
2
+ x + 1
• Bit order reverse and 1’s complement programmable setting for input data and CRC
sum.
• Programmable seed number setting.
• Supports CPU PIO or DMA back-to-back transfer.
• Accept any size of data width per write: 8, 16 or 32-bit.
– 8-bit write: 1-cycle operation.
– 16-bit write: 2-cycle operation (8-bit x 2-cycle).
– 32-bit write: 4-cycle operation (8-bit x 4-cycle).
7.29 Analog peripherals
7.29.1 16-bit Analog-to-Digital Converter (ADC)
The ADC supports a resolution of 16-bit and fast conversion rates of up to 1.0
Msamples/s. Sequences of analog-to-digital conversions can be triggered by multiple
sources.
7.29.1.1 Features
• 16-bit Linear successive approximation algorithm.
• Differential operation with 16-bit or 13-bit resolution.
• Single-ended operation with 16-bit or 12-bit resolution.
• Support for two simultaneous single ended conversions.
• Channel support for up to 64 analog input channels for conversion of external pin and
from internal sources.
• Select external pin inputs paired for conversion as differential channel input.
• Measurement of on-chip analog sources such as DAC, temperature sensor or
bandgap.
• Configurable analog input sample time.
• Configurable speed options to accommodate operation in low power modes of SoC.
• Trigger detect with up to 16 trigger sources with priority level configuration. Software
or hardware trigger option for each.