Datasheet

LPC55S6x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2019. All rights reserved.
Product data sheet Rev. 1.0 — 26 February 2019 35 of 123
NXP Semiconductors
LPC55S6x
32-bit ARM Cortex-M33 microcontroller
[1] PU = input mode, pull-up enabled (pull-up resistor pulls pin up towards V
DD
). PD = input mode, pull-down enabled (pull-down resistor
pulls pin down towards V
SS
). Z = high impedance; pull-up, pull-down, and input disabled. AI = analog input. I = input. O = output. I/O =
input/output. Reset state reflects the pin state at reset without boot code operation. For pin states in the different power modes, see
Section 6.1.2 “Pin states in different power modes”. For termination on unused pins, see Section 6.1.1 “Termination of unused pins”.
[2] Pad with programmable glitch filter; provides digital I/O functions with TTL levels and hysteresis; normal drive strength. See Figure 31.
Pulse width of spikes or glitches suppressed by input filter is from 3 ns to 16 ns (simulated value).
[3] True open-drain pin. I2C-bus pins compliant with the I2C-bus specification for I2C standard mode, I2C Fast-mode, and I2C Fast-mode
Plus. The pin requires an external pull-up to provide output functionality. When power is switched off, this pin is floating and does not
disturb the I2C lines. Open-drain configuration applies to all functions on this pin.
[4] Pin providing standard digital I/O functions with configurable modes, configurable hysteresis, and analog input. When configured as an
analog input, the digital section of the pin is disabled.
[5] Reset pad with glitch filter and hysteresis. Pulse width of spikes or glitches suppressed by input filter is from 3 ns to
20 ns (simulated value)
[6] Transparent analog pad.
[7] Optional bypass mode is supported, xtal32M_P can be driven by an external clock with restrictions in terms of drive level.
[8] The corresponding VBUS must be connected to supply voltage when using the USB peripheral. VBUS is 5V tolerant.
[9] Main battery supply: Star connection at application level (PCB).
[10] If the USB1_3V3 pin is not using the same supply as the VBAT_PMU pin, the application should ensure the supply on USB1_3V3 does
not drop below 2.8 V. If the USB1_3V3 pin is using separate supply and this voltage unexpectedly drops below 2.8 V, the USB PHY can
go into unknown state causing USB transactions (R/W) to hang. In this case, the application can detect this event with a time-out and
would have to recover by performing a USB reset.
VSS_DCDC N12,
M12
46, 47 - - Star ground connection is managed to PCB ground plane.
VSS_PMU M11 - - - Star ground connection is managed to PCB ground plane.
VSSA H2 19 - - Analog ground.
XTAL32K_N J12 53 - - RTC oscillator output.
XTAL32K_P J13 52 - - RTC oscillator input.
XTAL32M_N M3 28
[7]
- - Main oscillator output.
XTAL32M_P N3 29
[7]
- - Main oscillator input.
Table 3. Pin description …continued
Symbol
98 pin VFBGA 100 pin HLQFP Reset state
[1]
Type Function #
Description